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1f60ddef5d
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[PD] Introduce runtime role switching between prefill and decode (#28403)
Signed-off-by: huanglong <huanglong@linux.alibaba.com>
Signed-off-by: inkcherry <mingzhi.liu@amd.com>
Co-authored-by: huanglong <huanglong@linux.alibaba.com>
Co-authored-by: Shangming Cai <csmthu@gmail.com>
Co-authored-by: Huang Long <121648372+LLLL114@users.noreply.github.com>
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2026-09-18 01:45:12 +08:00 |
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Byron HsuandByron Hsu
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a98d921658
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[DP Attn] Fix crash for no token all-gather case (#39899)
Co-authored-by: Byron Hsu <byron+per@periodiclabs.ai>
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2026-09-17 09:21:09 -07:00 |
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25c9f724d4
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fix(multimodal): handle tensor images in exact-token preprocessing (#30368)
Signed-off-by: Zhuangcheng(Jesse) Gu <zcgu@connect.hku.hk>
Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com>
Co-authored-by: Mick <mickjagger19@icloud.com>
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2026-09-17 09:20:21 -07:00 |
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vstone-w
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a9fb1c3238
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dsv4(npu): support prefill context parallelism with interleave and zigzag (#39427)
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2026-09-17 19:59:41 +08:00 |
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Shuwen Wang
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6ca866ea29
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[HiCache][Perf] fix: batch HiCache D2H submits per step for hybrid pools (#39050)
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2026-09-17 17:53:58 +08:00 |
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yl3469andShuwen Wang
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1a90ae6727
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Add Agentic-Aware Tail-Optimized LRU eviction to the unified radix cache (#34012)
Co-authored-by: Shuwen Wang <47200617+alphabetc1@users.noreply.github.com>
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2026-09-17 17:52:59 +08:00 |
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e970453b43
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[NPU]Refactor weight processing and add NPUSwigluLimit activation (#38420)
Co-authored-by: AndyLi429 <AndyLi429@noreply.gitcode.com>
Co-authored-by: Even Zhou <even.y.zhou@outlook.com>
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2026-09-17 16:40:32 +08:00 |
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acfde25d34
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Carry deferred attention operands and reuse multimodal shared memory (#39870)
Co-authored-by: fei-xx <135589532+fei-xx@users.noreply.github.com>
Co-authored-by: jmswen <jmswen@gmail.com>
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2026-09-17 01:17:15 -07:00 |
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Lianmin Zhengandjiayisuse
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882577451e
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Restrict SafeUnpickler standard-library globals (#39858)
Co-authored-by: jiayisuse <jiayisuse@fb.com>
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2026-09-17 01:09:55 -07:00 |
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chuyehandjacky.cheng
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71ef869ece
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[AMD][Bugfix] Fix vattn_asm HIP error 709 under CUDA graph capture on ROCm 10 (#39513)
Co-authored-by: jacky.cheng <yichiche@amd.com>
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2026-09-17 01:06:04 -07:00 |
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Teng MaandTeng Ma
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15b256bdb0
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[HiCache] fix: resolve Mooncake local_hostname per node for runtime attach (#29668)
Co-authored-by: Teng Ma <11641725+stmatengss@users.noreply.github.com>
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2026-09-17 15:51:21 +08:00 |
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Liangsheng YinandBBuf
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3401b75240
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dsv4.1: Engram module and request history support (#39666)
Co-authored-by: BBuf <1182563586@qq.com>
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2026-09-16 23:49:47 -07:00 |
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8ae4a39b50
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Gate mamba extra-buffer predicates on uses_mamba_radix_cache (#37474)
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
Co-authored-by: Ke Bao <ispobaoke@gmail.com>
Co-authored-by: Sam Shleifer <sam@thinkingmachines.ai>
|
2026-09-17 14:39:12 +08:00 |
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Ke BaoandSam Shleifer
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fd6f96bf96
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Re-land dp-attention local control broadcast test (#39835)
Co-authored-by: Sam Shleifer <sshleifer@gmail.com>
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2026-09-17 14:33:25 +08:00 |
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Kurt ShusterandKe Bao
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6460082c05
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[Mamba] Fix checkpoint depth for prefixes that end off the radix page (#39115)
Co-authored-by: Ke Bao <ispobaoke@gmail.com>
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2026-09-17 14:30:57 +08:00 |
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Liangsheng Yin
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1c4b130bf7
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[CI] Unify basic and speculative sanity accuracy checks with MMLU (#39906)
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2026-09-16 22:19:05 -07:00 |
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Liangsheng Yin
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923e4a56d4
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[CI] Fix sanity evaluation and diffusion test suite blockers (#39892)
|
2026-09-16 21:47:41 -07:00 |
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25ce8063f7
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Pipeline parallelism x speculative decoding (EAGLE/MTP) compatibility (#30775)
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
Co-authored-by: YAMY1234 <74099316+YAMY1234@users.noreply.github.com>
Co-authored-by: Yangmin Li <yangminl@nvidia.com>
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2026-09-16 21:41:54 -07:00 |
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Liangsheng YinandBBuf
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464fffbec8
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dsv4.1: chat encoding and tool parsing (#39665)
Co-authored-by: BBuf <1182563586@qq.com>
|
2026-09-16 20:49:42 -07:00 |
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Shuwen Wang
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33d46376a6
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[HiCache] Yield idle scheduler so storage workers can drain (#38504)
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2026-09-17 10:56:11 +08:00 |
|
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Michele PalazziandTeng Ma
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329ffc89b9
|
[Mooncake] Fix silent SSD offload corruption when TP/PP ranks share ssd_offload_path (#31926)
Signed-off-by: Michele Palazzi <sysdadmin@m1k.cloud>
Co-authored-by: Teng Ma <sima.mt@alibaba-inc.com>
|
2026-09-17 10:51:03 +08:00 |
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84d7604b7e
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[XPU] weekly simple model enablement 2026/09/14 (#39439)
Co-authored-by: Juan Muneton <102537701+jmunetong@users.noreply.github.com>
Co-authored-by: YangKai0616 <kai.yang@intel.com>
Co-authored-by: devan-carlin <devan-carlin@users.noreply.github.com>
Co-authored-by: Ashwini Rathi <arathi@habana.ai>
Co-authored-by: Ranjan Debnath <ranjan.debnath@intel.com>
Co-authored-by: Juan Muneton <juan.muneton.gallego@intel.com>
Co-authored-by: Amrutha M <amrutha.m@intel.com>
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2026-09-17 10:43:04 +08:00 |
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4793f56835
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[HiCache] Keep hybrid transfer layer maps stage-local under PP (#39699)
Co-authored-by: Aurick Qiao <6137920+aurickq@users.noreply.github.com>
Co-authored-by: Ke Bao <ispobaoke@gmail.com>
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2026-09-17 10:18:44 +08:00 |
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qyb233
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4fb9b5b5ba
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feat(hicache): support NPU Mamba states with FIA and async IO (#32500)
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2026-09-17 10:12:26 +08:00 |
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Shuwen Wang
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4c85172f3a
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[HiCache] Back up MXFP8 KV scales in the host pool (#39089)
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2026-09-17 09:40:26 +08:00 |
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c89c63fa38
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dsv4.1: vision tower and image preprocessing (#39668)
Co-authored-by: BBuf <1182563586@qq.com>
Co-authored-by: Yuhao Yang <47235274+yhyang201@users.noreply.github.com>
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2026-09-16 18:11:16 -07:00 |
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Liangsheng Yin
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dc067c7d8c
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[Fix] Allow closed object schemas in Outlines prevalidation (#39869)
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2026-09-16 16:42:17 -07:00 |
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William Arnoldandishandhanani
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f45aad44bd
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[gRPC] Expose native pause status (#37488)
Co-authored-by: ishandhanani <82981111+ishandhanani@users.noreply.github.com>
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2026-09-16 15:16:52 -07:00 |
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13d593b6cf
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dsv4.1: compression, KV I/O, and metadata kernels (#39652)
Co-authored-by: BBuf <1182563586@qq.com>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
Co-authored-by: DarkSharpness <76582120+DarkSharpness@users.noreply.github.com>
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2026-09-16 13:54:07 -07:00 |
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Justin Perlman
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869674b3a7
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[Fix] Prevalidate JSON Schema support per grammar backend (#37839)
|
2026-09-16 13:10:15 -07:00 |
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Qiaolin Yu
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43390f63f5
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[qwen 3.8 next] change the testing model in test_qwen4_exp_models.py (#39662)
|
2026-09-16 12:47:45 -07:00 |
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Xinyuan Tong
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f0bf652534
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Add Ling-3.0-flash-VL model support (#38526)
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2026-09-17 00:19:26 +08:00 |
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cctry
|
1b78083b42
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[PD] Add optional KV transfer checksums (#39500)
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2026-09-16 23:53:30 +08:00 |
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AMD-yanfeiwangandDuyi-Wang
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a813224e78
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[ROCm][DSV4] Enable breakable CUDA graph prefill (#37810)
Co-authored-by: Duyi-Wang <duyi.wang@amd.com>
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2026-09-16 08:52:11 -07:00 |
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Ke Bao
|
5aaa18207c
|
Revert "[CI] Add e2e test for dp-attention local control broadcast" (#39828)
|
2026-09-16 23:41:50 +08:00 |
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|
ymren
|
cc171fbad0
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feat: support custom OTLP trace service name (#35802)
|
2026-09-16 22:37:42 +08:00 |
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pllimax
|
00a9a81b67
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[NPU][CI] Fail fast and speed up long-running qwen3.6 accuracy cases (#39813)
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2026-09-16 20:20:37 +08:00 |
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ShunkangzandZhangheng
|
e7f7447333
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[kv-shard 2/4] Sharded pools (#37615)
Co-authored-by: Zhangheng <hzh0425@apache.org>
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2026-09-16 19:22:23 +08:00 |
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76e06febab
|
[CI] Add e2e test for dp-attention local control broadcast (#39437)
Co-authored-by: Sam Shleifer <sam@thinkingmachines.ai>
Co-authored-by: Claude Fable 5.1 <noreply@anthropic.com>
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2026-09-16 18:11:40 +08:00 |
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Aurick QiaoandAurick Qiao
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7b7620774c
|
Fix device context during NIXL backend initialization (#38774)
Co-authored-by: Aurick Qiao <6137920+aurickq@users.noreply.github.com>
|
2026-09-16 17:59:24 +08:00 |
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Jensen
|
5beb2fd552
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[NPU] Avoid device synchronization in Ascend sampling (#39404)
|
2026-09-16 10:15:16 +03:00 |
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|
+4
|
faaff1eca8
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dsv4.1: Top-k kernels and candidate selection (#39648)
Co-authored-by: BBuf <1182563586@qq.com>
Co-authored-by: Cheng Wan <54331508+ch-wan@users.noreply.github.com>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
Co-authored-by: DarkSharpness <2040703891@qq.com>
Co-authored-by: DarkSharpness <76582120+DarkSharpness@users.noreply.github.com>
Co-authored-by: Ke Bao <ispobaoke@gmail.com>
Co-authored-by: Khoa Pham <khoa.pham@radixark.ai>
Co-authored-by: Xiaoyu Zhang <1182563586@qq.com>
Co-authored-by: Xiaoyu Zhang <xiaoyu.zhang@radixark.ai>
Co-authored-by: Yuhao Yang <47235274+yhyang201@users.noreply.github.com>
Co-authored-by: Yuwei An <ayw.sirius19@gmail.com>
Co-authored-by: Zhichen Zeng <zczeng@uw.edu>
Co-authored-by: Ziyi Xu <ziyi.xu@radixark.ai>
|
2026-09-15 23:54:35 -07:00 |
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Liangsheng Yin
|
91f691c490
|
dsv4.1: standalone kernels and Python wrappers (#39646)
|
2026-09-15 22:31:18 -07:00 |
|
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Shangming CaiandClaude Opus 5
|
3f8eb35ead
|
[PD] Do not admit intake-rejected requests to a PD handoff (#38935)
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
|
2026-09-16 12:44:49 +08:00 |
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Dayananda VandClaude Opus 5
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100e1cd0d9
|
[Fix] Spawn, don't fork, the benchmark server process (#34712)
Co-authored-by: Claude Opus 5 <noreply@anthropic.com>
|
2026-09-16 12:44:09 +08:00 |
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Xinguo ZhuandAKatydid
|
4678536df6
|
[CPU] Add fp8_per_tensor_scaled_mm_cpu kernel (#32618)
Co-authored-by: AKatydid <xinguojoe@gmail.com>
|
2026-09-16 12:31:05 +08:00 |
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Xiaoyu Zhang
|
537ac52c5b
|
[SRT] Clean up no-op compiler pass, dead helpers, and migration tests (#39295)
|
2026-09-16 12:04:21 +08:00 |
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Rahul Vijayaraghavan
|
d4ad368ed9
|
[Intel XPU] Enable fused_moe_triton tuning on XPU and add tuned DeepSeek-OCR-2 configs (#28723)
|
2026-09-16 10:20:22 +08:00 |
|
|
Cao E
|
f11cd8ab0e
|
[XPU] Use torch scaled_mm for XPU block FP8 linear (#35605)
|
2026-09-16 10:10:31 +08:00 |
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Yuxingwang-intelandMa Mingfei
|
2cb51f5d22
|
[CPU] [Diffusion] Add fused scale-shift and norm kernels for CPU (#33452)
Co-authored-by: Ma Mingfei <mingfei.ma@intel.com>
|
2026-09-16 10:01:29 +08:00 |
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