20 Commits
Author SHA1 Message Date
ashwini rathi 238ba40c27 [XPU][CI] key persistent JIT kernel cache by image content ID (#35337) 2026-08-20 10:27:59 +08:00
ashwini rathi 5eb117f6ca [XPU] Fix decode graph runner is_current_stream_capturing on non-CUDA devices (#35050) 2026-08-18 14:28:13 +08:00
ashwini rathiandarathi-hlab 456c5551cc [XPU][test] Add cache_salt=None to _make_req in test_lmcache_radix_cache.py (#34728)
Co-authored-by: arathi-hlab <arathi.hlab@users.noreply.github.com>
2026-08-14 10:27:15 +08:00
ashwini rathiandClaude Opus 4.7 d44c836cfd [XPU][CI] disable SYCL_CACHE_PERSISTENT to fix topk segfault (#34567)
Co-authored-by: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
2026-08-13 11:19:39 +08:00
ashwini rathi ae5f8c94b7 ci(xpu): harden nightly + PR XPU CI (HF login / tag fetch / docker push retries) (#32390) 2026-08-06 08:25:53 +08:00
ashwini rathiandMa Mingfei 53804d609c [CI][XPU] Stabilize XPU CI: pin UMD/IGC, retry infra flakes, right-size EAGLE3 (#32438)
Co-authored-by: Ma Mingfei <mingfei.ma@intel.com>
2026-08-04 16:28:52 +08:00
ashwini rathi 14c0a31829 [Bugfix] Fix Cohere2MoeConfig import crash from huggingface_hub @strict (#31769) 2026-07-22 08:56:30 +08:00
fafa302e41 [XPU][NIGHTLY] Add 8 XPU nightly tests, enable 1-gpu suite (#30246)
Co-authored-by: arathi-hlab <arathi-hlab@users.noreply.github.com>
Co-authored-by: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
2026-07-20 16:15:50 +08:00
3a8ddd3fd0 [XPU] Route topk_sigmoid and topk_softmax to AOT sgl-kernel-xpu symbols (#31038)
Co-authored-by: vshekhawat-hlab <vshekhawat@habana.ai>
Co-authored-by: Ma Mingfei <mingfei.ma@intel.com>
2026-07-16 10:29:19 +08:00
ashwini rathi cc7d7ba3dd [Intel XPU] Bump nightly per-file timeout to 120m and extend XPU CI monitor (#30100) 2026-07-06 12:26:28 +08:00
ashwini rathiandarathi-hlab 850719ebd9 [XPU] Unbreak stage-b: re-add --disable-decode-cuda-graph, quarantine EAGLE3 parity (#30048)
Co-authored-by: arathi-hlab <arathi.rajanraghavendran@intel.com>
2026-07-06 12:25:46 +08:00
ashwini rathiandClaude Opus 4.7 75cdaf432a Add XPU CI job monitor workflow (#29807)
Co-authored-by: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
2026-07-03 08:30:17 +08:00
ashwini rathiandSinghal, Shubham 5134dcdcab [Intel XPU] Initially add nightly GSM8K accuracy tests for Llama-3.1-8B (TP=2) and Qwen3-32B (TP=4) (#28908)
Co-authored-by: Singhal, Shubham <shubham.singhal@intel.com>
2026-07-01 16:27:24 +08:00
ashwini rathi 4f9b12c5dd [XPU] Guard tvm_ffi import in dsv4 compress modules under TYPE_CHECKING (#28426) 2026-06-16 15:52:12 -07:00
ashwini rathi fe887e6935 test(xpu): add multi-feature and embedding stage-b tests (#27861) 2026-06-12 14:36:28 +08:00
ashwini rathi 2a51479a91 ci(xpu): pull intel/sglang-dev:latest and clean workspace properly (#27860) 2026-06-11 13:14:56 +08:00
6110ed671f ci(xpu): clean build artifacts in cleanup (#27648)
Co-authored-by: Patil, Jitendra <jitendra.patil@intel.com>
Co-authored-by: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
2026-06-10 09:46:54 +08:00
ashwini rathiandClaude Opus 4.7 009a0ceefa [XPU CI] Re-enable stage B with docker-pull flow and split tests (#27526)
Co-authored-by: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
2026-06-09 09:26:11 +08:00
ashwini rathiandClaude Opus 4.7 acf65c1c68 [XPU CI] Pull prebuilt nightly image instead of building per-stage (#27282)
Co-authored-by: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
2026-06-08 11:08:41 +08:00
5c8a04ac4e [XPU CI] Expand stage-a and consolidate stage-b tests into stage-a (#27156)
Co-authored-by: vshekhawat-hlab <vshekhawat@habana.ai>
Co-authored-by: Ma Mingfei <mingfei.ma@intel.com>
2026-06-04 12:00:25 +08:00