 Rahul Vijayaraghavan
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d4ad368ed9
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[Intel XPU] Enable fused_moe_triton tuning on XPU and add tuned DeepSeek-OCR-2 configs (#28723)
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2026-09-16 10:20:22 +08:00 |
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Rahul Vijayaraghavan
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fa0ced195e
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[XPU] Enable breakable prefill CUDA graph on XPU (#30273)
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2026-07-21 09:09:40 +08:00 |
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Rahul VijayaraghavanandMa Mingfei
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d4963f5c55
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Fix prefill CUDA graph disabled for deeply-nested multimodal models (#30006)
Co-authored-by: Ma Mingfei <mingfei.ma@intel.com>
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2026-07-08 12:11:58 +08:00 |
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Rahul VijayaraghavanandMa Mingfei
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4b5c612257
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Skip redundant moe_sum_reduce for single-expert routing on XPU (#22660)
Co-authored-by: Ma Mingfei <mingfei.ma@intel.com>
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2026-07-07 09:03:16 +08:00 |
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Rahul Vijayaraghavan
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1aee04e7df
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[XPU] Support apply_router_weight_on_input for Llama4 for fused_experts (#22654)
merge this one as it is xpu only change.
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2026-04-29 10:44:48 +08:00 |
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Rahul Vijayaraghavan
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ac2819c81f
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Fix assertion tolerance for bf16 precision in triton attention UT (#17461)
Signed-off-by: Rahul Vijayaraghavan <rahul.vijayaraghavan@intel.com>
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2026-03-03 13:43:58 -08:00 |
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