 Jeremy Zhang
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f69d6fc28a
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[OpenAI] Propagate PD routing metadata through /v1/responses (#35503)
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2026-09-12 01:33:38 +08:00 |
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Vignesh Sethuraman
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ddf02a4f58
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[AMD] aiter: resolve SWA KV pool for draft workers + guard paged decode (#38756)
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2026-09-11 10:13:48 -07:00 |
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Mohammad Miadh AngkadandMohammad Angkad
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4309c7ce19
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Fix stale DSV4 indexer metadata names in the TopK v2 dispatch test (#39101)
Co-authored-by: Mohammad Angkad <mohammad.angkad@radixark.ai>
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2026-09-11 08:31:42 -07:00 |
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Xiaoyu Zhang
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d6b5dca90c
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[Diffusion] Optimize SANA-WM convolution post-processing and streaming GDN (#38529)
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2026-09-11 23:30:17 +08:00 |
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Shangming Cai
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2c10f87991
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[PD] Read nixl TransferInfo.is_dummy as a field in unit tests (#39100)
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2026-09-11 23:20:02 +08:00 |
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2a46cf2ca0
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[PD] Share the prefill->decode failure notification across backends (#36612)
Co-authored-by: inkcherry <mingzhi.liu@amd.com>
Co-authored-by: Shangming Cai <csmthu@gmail.com>
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2026-09-11 23:16:17 +08:00 |
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593c7a900d
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Add granite_thinking_parser reasoning parser for Granite 4.2 (#38693)
Signed-off-by: Yousaf Shah <yousaf.shah@gmail.com>
Co-authored-by: Claude <noreply@anthropic.com>
Co-authored-by: Xinyuan Tong <xinyuantong.cs@gmail.com>
Co-authored-by: Xinyuan Tong <115166877+JustinTong0323@users.noreply.github.com>
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2026-09-11 07:18:35 -07:00 |
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335f6aab27
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[DSV4] Support raw-index output in TopK v2 (#33672)
Co-authored-by: weireweire <20922698+weireweire@users.noreply.github.com>
Co-authored-by: Brayden Zhong <b8zhong@uwaterloo.ca>
Co-authored-by: Po-Han Huang (NVIDIA) <53919306+nvpohanh@users.noreply.github.com>
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2026-09-11 07:17:36 -07:00 |
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Xinyuan Tong
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e8a36d339c
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Auto-detect GLM-5.3 chat templates as glm45/glm47 parsers (#38297)
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2026-09-11 09:02:44 -04:00 |
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MickandMick Qian
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358c163250
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[diffusion] fix: recover ipc jit initialization after interrupted builds (#39034)
Co-authored-by: Mick Qian <mickqian@users.noreply.github.com>
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2026-09-11 19:34:09 +08:00 |
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822e73ccdd
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[Unified Cache][AMD] Support DeepSeek-V4 unified KV in direct external linkers (#38269)
Co-authored-by: amd-danli103 <danli103@amd.com>
Co-authored-by: Duyi-Wang <duyi.wang@amd.com>
Co-authored-by: TianDi101 <tiandi920722@gmail.com>
|
2026-09-11 01:49:29 -07:00 |
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Mohammad Miadh AngkadandMohammad Angkad
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ad5af539cd
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[CI] Trim DSV4 trtllm B200 tests (#39013)
Co-authored-by: Mohammad Angkad <mohammad.angkad@radixark.ai>
|
2026-09-11 01:04:16 -07:00 |
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Vignesh Sethuraman
|
76ef679cb1
|
[AMD] aiter: fail loudly on cross-layer KV sharing in target_verify (#38755)
|
2026-09-10 23:37:03 -07:00 |
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Jialin Ouyang
|
6182d45524
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[Test] Fix Q8KV8 sparse-prefill pool fixture after page-size rename (#39019)
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2026-09-10 22:22:35 -07:00 |
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Rishabh Sinha
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2018c64e22
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[PD] Add is_dummy truth-table wire tests for mooncake and nixl (#34977)
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2026-09-11 13:14:41 +08:00 |
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Shunkangz
|
40a84d6dfc
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[kv-shard 1/4] Logical-page placement with UnifiedRadixCache (#38356)
|
2026-09-10 22:06:42 -07:00 |
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Yikai Zhang
|
b3dc0388ed
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test(lora): enable ROCm logprob accuracy coverage (#38791)
|
2026-09-10 20:29:06 -07:00 |
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ANSHUMAN TRIPATHYandMa Mingfei
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0fadad8933
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DFLASH support added for XPU (#32798)
Co-authored-by: Ma Mingfei <mingfei.ma@intel.com>
|
2026-09-11 10:39:37 +08:00 |
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Miaomiao Jiang
|
690428b470
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[XPU] Add xpu forward in Gemma3RMSNorm & Add test and benchmark for Gemma3RMSNorm (#36278)
|
2026-09-11 10:32:25 +08:00 |
|
|
ANSHUMAN TRIPATHY
|
3716e496ea
|
Speculative Decoding support for intel_xpu attention backend on XPU target (#30548)
|
2026-09-11 10:25:25 +08:00 |
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ANSHUMAN TRIPATHYandmingfeima
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2adb2e8485
|
[XPU] Adapt device agnostic API usage (#32093)
Co-authored-by: mingfeima <mingfei.ma@intel.com>
|
2026-09-11 10:03:12 +08:00 |
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Siju Samuel
|
67d3a2ea57
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[XPU] Make checkpoint_engine worker device-agnostic (#32382)
|
2026-09-11 09:56:39 +08:00 |
|
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ad7f57c9ea
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[Responses] Fix empty-prompt routing for token-first chat encoders (kimi_k3, inkling) (#35486)
Co-authored-by: Xinyuan Tong <115166877+JustinTong0323@users.noreply.github.com>
Co-authored-by: Xinyuan Tong <xinyuantong.cs@gmail.com>
|
2026-09-11 01:06:20 +00:00 |
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jasonjk-park
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9df72e8f5a
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Fix custom logit processor params when num_tokens_in_batch is used (#38730)
|
2026-09-10 17:52:08 -07:00 |
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Liangsheng Yin
|
41da06adca
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[Refactor] Generalize DeepSeek V4 compressed pool management (#38954)
|
2026-09-10 17:29:03 -07:00 |
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Mohammad Miadh AngkadandMohammad Angkad
|
52c191da52
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[Deps] Retire the CUDA 12 lane (#38404)
Co-authored-by: Mohammad Angkad <mohammad.angkad@radixark.ai>
|
2026-09-10 16:58:09 -07:00 |
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fae8cd84cb
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Support NemotronH_Omni_Reasoning_V3 in SGLang (#35599)
Signed-off-by: Ryan Stewart <rystewart@nvidia.com>
Signed-off-by: rystewart-nvidia <rystewart@nvidia.com>
Co-authored-by: elvischenv <219235043+elvischenv@users.noreply.github.com>
Co-authored-by: Po-Han Huang (NVIDIA) <53919306+nvpohanh@users.noreply.github.com>
|
2026-09-10 16:57:22 -07:00 |
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cctry
|
203d7e812c
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Fix KV-canary workspace accounting after graph capture (#38596)
|
2026-09-10 16:10:12 -07:00 |
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cctry
|
42bbaac259
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[metrics] Report logical prefill token counts (#38566)
|
2026-09-10 16:09:21 -07:00 |
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Liangsheng Yin
|
dc5f59c3a2
|
[Refactor] Clarify DeepSeek V4 metadata names for V4.1 (#38947)
|
2026-09-10 15:42:52 -07:00 |
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Pengyun Lin
|
d076eec427
|
[SM120] Use exact query-head widths for DeepSeek-V4 sparse MLA decode (#36655)
|
2026-09-10 15:40:17 -07:00 |
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paulzhang-tm
|
a63efd9056
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[Spec] Support large MTP batches in short-convolution metadata (#38558)
|
2026-09-10 15:13:17 -07:00 |
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fd7743e0e1
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[Sampling] Support sampling masks with overlap scheduling (#36631)
Co-authored-by: ByronHsu <ByronHsu@users.noreply.github.com>
Co-authored-by: root <root@slurm-h200-208-179.slurm-compute.tenant-slurm.svc.cluster.local>
Co-authored-by: Byron Hsu <byron+per@periodiclabs.ai>
|
2026-09-10 14:52:44 -07:00 |
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|
YAMY
|
55b45cb45a
|
fix(qsa): dequantize FP8 cached prefixes in the sparse prefill kernels (#38855)
|
2026-09-10 14:07:39 -07:00 |
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Shuwen Wang
|
19b83b4b9d
|
[Radix Cache] Fix PureSWA tail release without insertion (#38349)
|
2026-09-10 23:55:48 +08:00 |
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Shuwen Wang
|
cc7e43ad22
|
[HiCache] Account for newly pinned ancestors in load-back quota (#38481)
|
2026-09-10 23:54:08 +08:00 |
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|
pllimax
|
92dffebe16
|
[NPU] Set DEEPEP_HYBRID_DEPLOYMENT for new DeepEP tests; switch glm5_2 to w8a8; tune nightly timeouts (#38775)
|
2026-09-10 23:32:54 +08:00 |
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Mohammad Miadh AngkadandMohammad Angkad
|
613002281e
|
[CI] Drop the GPTQ dynamic-config test for the deleted non-Marlin kernel (#38881)
Co-authored-by: Mohammad Angkad <mohammad.angkad@radixark.ai>
|
2026-09-10 20:55:06 +08:00 |
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Jialin Ouyang
|
908226fea2
|
[Rust TreeCore] Support external cache linker (#37306)
|
2026-09-10 19:22:24 +08:00 |
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|
|
8a6ab89bf0
|
[AMD] Enable Fast Triton Sparse MLA backend (#30575)
Co-authored-by: clintg6 <7388379+clintg6@users.noreply.github.com>
Co-authored-by: HAI <hixiao@gmail.com>
|
2026-09-10 01:58:00 -07:00 |
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|
|
55b4f4f195
|
[Test] Add offline Transformers loader compatibility checks (#38336)
Signed-off-by: adarshxs <adarsh.shirawalmath@gmail.com>
Co-authored-by: Xinyuan Tong <115166877+JustinTong0323@users.noreply.github.com>
Co-authored-by: Alex Nails <alex.nails@radixark.ai>
|
2026-09-10 01:07:43 -07:00 |
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1b77f498a0
|
[NVIDIA] Support flashinfer Mega Moe (#31470)
Co-authored-by: djns99 <40156487+djns99@users.noreply.github.com>
Co-authored-by: 云挚 <ningyunxiao.nyx@antgroup.com>
Co-authored-by: Yangmin Li <yangminl@nvidia.com>
Co-authored-by: Po-Han Huang (NVIDIA) <53919306+nvpohanh@users.noreply.github.com>
|
2026-09-10 00:22:47 -07:00 |
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Brayden ZhongandBrayden Zhong
|
c0b790cf7f
|
Delete cutlass_mla, non-Marlin GPTQ, AWQ AOT kernel, and Dual Chunk Flash Attention (#32114)
Co-authored-by: Brayden Zhong <brayden@radixark.ai>
|
2026-09-10 15:12:01 +08:00 |
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YC Yen-Ching Tseng
|
6b2e13bcb0
|
[AMD] Fix the diffusion perf fixture lookup (#38686)
|
2026-09-10 00:07:08 -07:00 |
|
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Bingxu Chen
|
bd922bc39b
|
[AMD][CI] Fix UMBP test buffer after MoRI upgrade (#38672)
|
2026-09-10 00:02:00 -07:00 |
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|
Michael
|
026e61bd94
|
[AMD] Restore AMD CI registrations dropped by #37436 (#38581)
|
2026-09-09 23:59:10 -07:00 |
|
|
DAI0818andPo-Han Huang
|
03e4c06589
|
Fix Qwen3.5 GDN multi-item scoring (#33922)
Co-authored-by: Po-Han Huang (NVIDIA) <53919306+nvpohanh@users.noreply.github.com>
|
2026-09-09 22:30:39 -07:00 |
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|
Cheng Wan
|
f1a512c51c
|
[Config] msgspec.Struct for the config tier (#38753)
|
2026-09-09 19:41:19 -07:00 |
|
|
Cheng Wan
|
53dc77ff4e
|
[Config] One writer for the declaration stash; no exception to the write seal (#38752)
|
2026-09-09 19:22:06 -07:00 |
|
|
|
fd596a474c
|
[XPU][Fix] Pack device-pointer tables as uint64 to avoid 64-bit address overflow (#35051)
Co-authored-by: roopaksrivastav <roopak.srivastava@intel.com>
Co-authored-by: Claude Opus 5 <noreply@anthropic.com>
|
2026-09-10 10:12:18 +08:00 |
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