Commit Graph
18298 Commits
Author SHA1 Message Date
Zhang, Jiejingandfanxingran f920be4b09 [AMD] GLM-5.2 NextN: cast draft fused MoE to per-channel FP8 (#39155)
Co-authored-by: fanxingran <xingran.fan@amd.com>
2026-09-15 18:56:48 -07:00
7eedd57ab0 [ROCm] Fix EAGLE spec-decode verify silently sampling greedy on HIP (#37134)
Co-authored-by: JohnQinAMD <yanyuan.qin@amd.com>
Co-authored-by: Jiejing Zhang <jiejing.zhang@amd.com>
2026-09-15 18:49:49 -07:00
Liangsheng Yin 2f7d04da5d dsv4.1: Rust extension modules for image preprocessing, KV pool names, and PD bootstrap (#39677) 2026-09-15 18:11:48 -07:00
Jinyan Yi dbd7281b06 fix(npu): fix hybrid KV transfer with PP prefill in PD disaggregation (#38402) 2026-09-16 09:10:17 +08:00
Zhiqiang Xie 4e9e407d37 [HiCache] Label radix-cache metrics per rank and split the "shrunk" prefetch reason (#39280) 2026-09-15 17:54:04 -07:00
Siyuan ChenandYuwei An c9a8fba991 [DSV4][BCG] Optimize the heavy memory use of C4 Indexer when BCG is enabled (#36534)
Co-authored-by: Yuwei An <ayw.sirius19@gmail.com>
2026-09-15 17:23:11 -07:00
bbef93e22a [Router] Add a KV storage-tier coverage row to the Grafana dashboard (4/4) (#39111)
Co-authored-by: Kangyan Zhou <kangyan.zhou@radixark.ai>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
2026-09-15 17:09:11 -07:00
63845a1bb2 [router] Resolve a wire protocol per worker at registration (#39004)
Co-authored-by: Kangyan Zhou <kangyan.zhou@radixark.ai>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
2026-09-15 16:54:37 -07:00
Liangsheng Yin 0dabef3d30 [misc] Fix tool-call index, graph padded-row count, and prefill-graph input_embeds refresh (#39574) 2026-09-15 16:37:22 -07:00
fb91baedab [Router] Real-GPU e2e coverage for storage-tier-aware cache routing (3/4) (#39110)
Co-authored-by: Kangyan Zhou <kangyan.zhou@radixark.ai>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
2026-09-15 15:48:51 -07:00
Lianmin Zheng b803cfa0c4 Add external multimodal processors to the Rust frontend (#39329) 2026-09-15 15:38:47 -07:00
2929a39927 Use a shared byte budget for unified hybrid-SWA memory (#36729)
Co-authored-by: yhzhuang <yhzhuang@fb.com>
Co-authored-by: Cheng Wan <cheng.wan@radixark.ai>
2026-09-15 15:27:00 -07:00
4da5599e93 Fix first-token metadata and reused attention-layer indexing (#39328)
Co-authored-by: Jinghui Zhang <jinghui@meta.com>
Co-authored-by: Lucia Fang <116399278+luccafong@users.noreply.github.com>
2026-09-15 15:22:26 -07:00
08b1922405 fix(gemma4): set lm_head_is_tied for Gemma4UnifiedForConditionalGeneration (#35809)
Co-authored-by: kpham-sgl <khoa.pham@radixark.ai>
Co-authored-by: Claude Fable 5.1 <noreply@anthropic.com>
2026-09-15 15:16:39 -07:00
Liangsheng Yin 87c9f78e99 [Fix][PD] Give prefill and decode their own RDMA NICs in disaggregation tests (#39584) 2026-09-15 15:07:42 -07:00
Cheng Wan 406c9c71d8 [Feature] Support BF16 and batch-invariant inference with DeepEP v2 (#38160) 2026-09-15 14:30:50 -07:00
Liangsheng Yin d58342deab [Fix] Release NCCL on scheduler exit and let the ASGI server own shutdown (#39560) 2026-09-15 13:39:15 -07:00
3c48c1e967 [Router] Expose the KV storage-tier stream and tree occupancy on /metrics (2/4) (#39109)
Co-authored-by: Kangyan Zhou <kangyan.zhou@radixark.ai>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
2026-09-15 13:30:05 -07:00
YAMY 24874f90a3 [Test] Fix DeepGEMM batch invariance test output dtype (#39636) 2026-09-15 12:40:28 -07:00
jasonjk-parkandjasonjk 073fdf97cc Generalize auxiliary outputs (#39164)
Co-authored-by: jasonjk <jasonjk@twshared0085.36.lco2.facebook.com>
2026-09-15 12:05:13 -07:00
Zhiqiang Xie 49f540f3c0 [HiCache] Optimize buffer-mode storage existence bookkeeping (#39480) 2026-09-15 10:49:58 -07:00
Zhiqiang Xie 7f5dd19256 [HiCache] Rework the buffer-mode storage prefetch pipeline and retry bookkeeping (#39283) 2026-09-15 10:48:49 -07:00
Bingxu Chen 03ea13a545 [AMD][CI] Consolidate AMD workflows and retire ROCm 7.0 CI (#38632) 2026-09-15 23:45:22 +08:00
Shangming CaiandClaude Opus 5 47a157f257 [CI][Disaggregation] Fix EADDRINUSE flake in test_disaggregation_dwdp_gpt_oss (#39611)
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
2026-09-15 23:05:05 +08:00
pllimax 1aeeb25e86 [NPU][CI] Scope NPU nightly artifact dirs by image; fix stale glm5_2 case (#39585) 2026-09-15 22:55:53 +08:00
Siyuan ChenandBJWang-ant 832ec39cc0 [Intra-node PD][DSV4] Pack all layers into one batch for INTRA_NODE_NVLINK path (#38984)
Co-authored-by: BJWang-ant <wangbingjia.wbj@ant-intl.com>
2026-09-15 21:08:33 +08:00
Po-Han Huang (NVIDIA) a2a261963f [CI] Fix SWA decode radix cache NIXL import (#39600) 2026-09-15 21:01:05 +08:00
Yoray ZackandPo-Han Huang 1895cabfa8 Fix mooncake scale joiner groups (#38503)
Co-authored-by: Po-Han Huang (NVIDIA) <53919306+nvpohanh@users.noreply.github.com>
2026-09-15 19:07:25 +08:00
Elizaveta Martirosianandronnie_zheng fb01a079a6 [NPU] [CI] Fix multimodal_gen filter leakage and add daily scheduled run (#39411)
Co-authored-by: ronnie_zheng <zl19940307@163.com>
2026-09-15 14:03:11 +03:00
Yuxuan ZhangandXinyuan Tong 17ba2c2e7c Support non-strict GLM47 tool calls with EBNF constraints (#38890)
Co-authored-by: Xinyuan Tong <xinyuantong.cs@gmail.com>
2026-09-15 16:41:48 +08:00
Qiaolin Yu 2c0a70960c [qwen 3.8 next] reuse old cuda stream instead of endlessly creating streams (#39474) 2026-09-15 01:36:14 -07:00
Liangsheng Yin 8565b11003 [misc] Trim redundant variants from the 8-gpu-h20 disaggregation test suite (#39544) 2026-09-15 01:24:46 -07:00
4f52c9948b keeping router GEMM in fp32 for deterministic inference (DeepSeek V3/V4) (#38176)
Co-authored-by: Brayden Zhong <b8zhong@uwaterloo.ca>
Co-authored-by: Brayden Zhong <brayden@radixark.ai>
2026-09-15 16:16:09 +08:00
Beihao ZhouandBrayden Zhong 37ebacb50f [EPLB] Drop defensive getattr for ep_dispatch_algorithm (#31804)
Co-authored-by: Brayden Zhong <b8zhong@uwaterloo.ca>
2026-09-15 16:14:41 +08:00
Bi XueandLianmin Zheng df254b0a11 [profiler] Label draft-runner steps DRAFT and target verify VERIFY in step spans (#38630)
Co-authored-by: Lianmin Zheng <lianminzheng@gmail.com>
2026-09-15 00:57:05 -07:00
0e9b6bf8d8 [Router] Extract worker selection into policies::selection (no behavior change) (#39322)
Co-authored-by: Kangyan Zhou <kangyan.zhou@radixark.ai>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
2026-09-15 15:49:31 +08:00
Khoa Pham e4a6b090f4 [CI] Run test_unified_radix_cache_kl_dcp on cutedsl_mla with bf16 KV cache (#39553) 2026-09-15 00:35:01 -07:00
iridiumine 8a20062652 [NPU][Bugfix] Disable pinned memory to fix DeepSeek-V2 DP-attention hang (#39423) 2026-09-15 14:59:31 +08:00
amote-i 575163ff32 [NPU] [DOC] delete unsupported models in npu docs (#39555) 2026-09-15 14:55:17 +08:00
06992c92ad [Fix] Aggregate all IPC weight update responses (#39534)
Signed-off-by: bojiang-li <327132355+bojiang-li@users.noreply.github.com>
Co-authored-by: hnyls2002 <lsyincs@gmail.com>
Co-authored-by: Liangsheng Yin <hnyls2002@gmail.com>
2026-09-14 23:25:46 -07:00
Liangsheng Yin 860fa83a9f [CI] Wait for a killed test server's GPU memory before the next launch (#39545) 2026-09-14 23:24:37 -07:00
Cui Lily e687b8d6af [CPU] Implement fused QK Norm and RoPE kernels (#37748)
Signed-off-by: Cui, Lily <lily.cui@intel.com>
2026-09-15 14:17:57 +08:00
Khoa PhamandClaude Fable 5.1 2c37b90ad6 [Fix][DCP] Localize widened KV ids in MLA retraction CPU backup/restore (#39487)
Co-authored-by: Claude Fable 5.1 <noreply@anthropic.com>
2026-09-15 13:33:41 +08:00
ddd4600197 [Fix] HiCache startup ImportError on the pinned kernel wheel (#39516)
Co-authored-by: Mohammad Angkad <mohammad.angkad@radixark.ai>
Co-authored-by: Liangsheng Yin <hnyls2002@gmail.com>
Co-authored-by: hnyls2002 <lsyincs@gmail.com>
2026-09-14 22:31:19 -07:00
Shuwen Wang 5298d85218 fix: stop shadowing the DSpark shared-experts fusion guard (#39366) 2026-09-14 22:24:49 -07:00
ashwini rathiandClaude Opus 4.7 b510881157 [Fix][Qwen-VL] Normalize <image> sentinel on artifact fast path (#39278)
Co-authored-by: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
2026-09-15 13:19:59 +08:00
6c514ab025 Force reasoning mode for GLM-5.3 chat templates (#39227)
Co-authored-by: Brayden Zhong <b8zhong@uwaterloo.ca>
Co-authored-by: Mohammad Angkad <mohammad.angkad@radixark.ai>
Co-authored-by: Xinyuan Tong <xinyuantong.cs@gmail.com>
Co-authored-by: Xinyuan Tong <115166877+JustinTong0323@users.noreply.github.com>
2026-09-15 13:16:26 +08:00
Yanbin Jiang ebd37705e4 [PD][LoRA] Gate decode admission on adapter slots (#39332) 2026-09-15 13:11:04 +08:00
ishandhanani 3f871a246c feat(agent sessions): attribute stored KV cache blocks to sessions (#37482)
Signed-off-by: Ishan Dhanani <ishandhanani@gmail.com>
2026-09-14 21:34:49 -07:00
Byron HsuandByron Hsu c9fbe5f655 [MM] Add flag to force Kimi image preprocessing onto CPU (#39148)
Co-authored-by: Byron Hsu <byron+per@periodiclabs.ai>
2026-09-14 21:19:39 -07:00