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cfc0a0e0e0
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Add Intel Quantization Support in SGLang (#18139)
Signed-off-by: Mengni Wang <mengni.wang@intel.com>
Signed-off-by: WeiweiZhang1 <weiwei1.zhang@intel.com>
Co-authored-by: Peng Zhang <aniz1905@gmail.com>
Co-authored-by: Ma Mingfei <mingfei.ma@intel.com>
Co-authored-by: Weiwei <weiwei1.zhang@intel.com>
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2026-06-26 09:54:35 +08:00 |
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Khoa PhamandClaude Opus 4.7
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6c92f9f328
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fix(bench): pass DCP_RANK/DCP_WORLD_SIZE to set_mla_kv_buffer_kernel (#29356)
Co-authored-by: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
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2026-06-25 18:13:57 -07:00 |
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hhhh1252023
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781537b61d
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[NPU] Nightly CI refactor and enhancement (#27433)
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2026-06-26 08:52:06 +08:00 |
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Xinyuan Tong
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ed71fb8f95
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fix(anthropic): detect-and-passthrough mid-conversation system messages (#28906)
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2026-06-25 17:14:12 -07:00 |
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Yibo Cai
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4ce1c180bd
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[sgl-kernel/cpu]: fix arm64 w8a8 moe kernel signature (#29270)
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2026-06-26 08:11:57 +08:00 |
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Lijuan Tang
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623300a589
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[MLX] Fix FutureMap relay unit test to use RelayPayload (#29311)
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2026-06-25 16:53:58 -07:00 |
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Ma Mingfei
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1ba7c79761
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[CPU] add indices in chunk_gated_delta_rule (#29267)
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2026-06-26 07:51:07 +08:00 |
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Khoa PhamandClaude Opus 4.7
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c8c6757bed
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test(dp-attn): drop --enable-torch-compile from TestDPAttentionDP2TP2 (#29345)
Co-authored-by: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
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2026-06-25 16:41:35 -07:00 |
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Augusto Yao
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ea8f4e9f3f
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[feature] implement dcp for deepseek_v2 (#14194)
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2026-06-25 15:15:04 -07:00 |
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Mohammad Miadh Angkad
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212c30d008
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[MoE Refactor] Centralize FlashInfer CUTLASS MoE runner (#28211)
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2026-06-25 13:40:33 -07:00 |
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Michael
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e6efe10072
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[AMD] Register 5 JIT kernel unit tests for AMD nightly CI (#29197)
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2026-06-25 13:12:58 -07:00 |
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Baizhou Zhang
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3344b73c80
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Add DeepSeek V4 Pro GB300 nightly and expand Kimi K25 nightly test (#28103)
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2026-06-25 12:13:52 -07:00 |
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Brayden ZhongandBrayden Zhong
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9495737d82
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Fix CI broken by #28450 (#29308)
Co-authored-by: Brayden Zhong <brayden@radixark.ai>
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2026-06-25 10:35:34 -07:00 |
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Rita Brugarolas
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3d3a7ec031
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[AMD] fix(moe): correct fused shared-expert scaling on aiter/DeepEP path (mori all-to-all) (#28237)
Signed-off-by: Rita Brugarolas Brufau <rita.brugarolasbrufau@amd.com>
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2026-06-25 01:56:30 -07:00 |
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Michael
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ec12a28a87
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[AMD] Register 7 JIT kernel unit tests for AMD nightly CI (#28967)
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2026-06-25 01:51:30 -07:00 |
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Michael
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4ba8634780
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[AMD] Register scripted-core chunked-prefill test for AMD extra-a CI (#29058)
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2026-06-25 01:50:08 -07:00 |
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Rita Brugarolas
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de2d01c8da
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[AMD] Fuse shared-expert append + DeepEP remap into one Triton kernel (#28450)
Signed-off-by: Rita Brugarolas Brufau <rita.brugarolasbrufau@amd.com>
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2026-06-25 01:22:57 -07:00 |
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Raiden MakotoandRaiden-Makoto
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9215da2515
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[AMD] [GLM5] skip redundant -inf pre-fill of HIP indexer MQA-logits (#28757)
Co-authored-by: Raiden-Makoto <Raiden-Makoto@users.noreply.github.com>
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2026-06-24 23:21:39 -07:00 |
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Liangsheng Yin
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c7734e6871
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[Spec] Dissolve EagleDraftInputV2Mixin so spec-info dataclasses hold data only (#29220)
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2026-06-24 18:08:30 -07:00 |
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fzyzcjy
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2b64fc7a2c
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Remove Req.extend_logprob_start_len field and make it pure (#27625)
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2026-06-25 09:06:14 +08:00 |
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Ma Mingfei
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2c3f007a65
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[CPU] optimize GDN prefill performance (#29117)
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2026-06-25 09:04:34 +08:00 |
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fzyzcjy
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7002a37ea1
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Inline extend_range accessors and remove the extend_input_len/fill_len properties (#27611)
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2026-06-25 08:56:44 +08:00 |
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fzyzcjy
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d0524d6433
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Avoid scattered assignment of extend_input_len and fill_len by merging them into Req.extend_range (#27610)
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2026-06-25 08:33:28 +08:00 |
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fzyzcjy
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563c3418a7
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Avoid dual semantics of extend_input_len by computing the candidate on the fly (#27616)
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2026-06-25 08:17:37 +08:00 |
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Brayden ZhongandBrayden Zhong
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5d4e63d49e
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Sync the changes in #23402 (#29063)
Co-authored-by: Brayden Zhong <brayden@radixark.ai>
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2026-06-24 17:01:02 -07:00 |
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Lianmin ZhengandRain Jiang
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fd87a85388
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Convert SamplingParams to msgspec Struct (#29198)
Co-authored-by: Rain Jiang <96632942+rainj-me@users.noreply.github.com>
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2026-06-24 13:42:45 -07:00 |
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Kaixi
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d5e9176f65
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[BCG][GLM5] perf: BCG support and prefill enhancements (#27053)
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2026-06-24 13:13:35 -07:00 |
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Lianmin Zheng
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d5c566e59b
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Extract profile request cleanups (#29098)
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2026-06-24 11:22:58 -07:00 |
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qiaozpandishandhanani
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03773ae35b
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[HiCache] Add NIXL FILE cache cleaner (#28258)
Co-authored-by: ishandhanani <82981111+ishandhanani@users.noreply.github.com>
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2026-06-24 08:13:55 -07:00 |
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hirakunaramuka2andClaude Fable 5
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7430c56b20
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[Misc] Use logger instead of print() in utils/common.py (#29004)
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
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2026-06-24 09:45:01 +00:00 |
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Yuhao Yang
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0fc815aa2c
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[CI] Temporarily disable openbmb MiniCPM tests (#29095)
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2026-06-24 01:39:44 -07:00 |
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jundu
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e04ed05193
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[CI] reduce CPU CI scope with base-c suite (#28623)
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2026-06-24 16:18:06 +08:00 |
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Even Zhou
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4da23fdc35
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[NPU] removes deprecated pr testing files (#27859)
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2026-06-24 16:06:45 +08:00 |
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zijiexiaandClaude Opus 4.8
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a707b2054d
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[CI] Fix pre-commit failures in MLX backend tests (#29141)
Co-authored-by: Claude Opus 4.8 <noreply@anthropic.com>
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2026-06-24 15:56:52 +08:00 |
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5f76736427
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kimik2_detector fix the normal text detection before tool call. (#25071)
Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com>
Co-authored-by: Rohit Harkhani <rharkhani@gmail.com>
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2026-06-24 15:53:22 +08:00 |
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Yuan Luoandluoyuan.luo
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0df796473b
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[VLM] Qwen3-VL / Moss-VL ViT preprocessing optimizations (#28940)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
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2026-06-24 14:36:29 +08:00 |
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Stella-17andxinyue.fan
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6842335fcf
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[MUSA][24/N] CI:Fix LLM server smoke test (#28934)
Co-authored-by: xinyue.fan <xinyue.fan@mthreads.com>
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2026-06-23 22:58:59 -07:00 |
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toufupiand“toufupi”
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c394f812d1
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[MLX] Fix Apple Silicon server startup; align MLX tests with upstream (#28770)
Co-authored-by: “toufupi” <“byte2016@outlook.com”>
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2026-06-23 22:58:49 -07:00 |
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Alex Tumanov
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33373cbb12
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[misc] Move bench_serving into sglang.benchmark (#28996)
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2026-06-23 19:34:11 -07:00 |
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Liangsheng Yin
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b448b08401
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[misc] Move bench_offline_throughput into sglang/benchmark/ with a back-compat shim (#28747)
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2026-06-23 18:37:52 -07:00 |
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karverma-amdandsogalin_codegen
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20b2817bdf
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[AMD] Enable BCG on ROCm + route aiter prefill via MHA during PCG/BCG capture for Kimi-2.5 (#27833)
Co-authored-by: sogalin_codegen <39478626+sogalin@users.noreply.github.com>
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2026-06-23 18:22:41 -07:00 |
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Polisetty V R K Jyothendra VarmaandMa Mingfei
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5338e44483
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[Intel GPU] fix triton-mla attention on XPU by limiting max_kv_splits to 8 which is default (#28646)
Signed-off-by: P V R K Jyothendra Varma <polisetty.v.r.k.jyothendra.varma@intel.com>
Co-authored-by: Ma Mingfei <mingfei.ma@intel.com>
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2026-06-24 09:06:13 +08:00 |
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b2c8f7a22e
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[AMD] Support triton backend decode context parallel for Qwen3.5 (#25090)
Co-authored-by: Baizhou Zhang <sobereddiezhang@gmail.com>
Co-authored-by: Kangyan-Zhou <zky314343421@gmail.com>
Co-authored-by: Khoa Pham <khoa.pham@radixark.ai>
Co-authored-by: Hubert Lu <55214931+hubertlu-tw@users.noreply.github.com>
Co-authored-by: zhengyao <zayao@amd.com>
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2026-06-23 17:35:56 -07:00 |
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Liangsheng Yin
|
9ef1830701
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[Scheduler] Extract DFlash prefill refill into a standalone MinFreeSlotsDelayer (#29089)
|
2026-06-23 17:04:55 -07:00 |
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Jackey Hua
|
f444b5897b
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[Spec][1/N] Decoupled speculative decoding: IPC protocol + cross-process request id + server flags (#27634)
|
2026-06-23 17:04:45 -07:00 |
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Lianmin Zheng
|
34dd9c28ca
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[Refactor] Introduce sock_send/sock_recv wrappers for zmq IPC (#29012)
|
2026-06-23 15:54:36 -07:00 |
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Liangsheng Yin
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c864c8d9c2
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[misc] Move bench_one_batch into sglang/benchmark/ with a back-compat shim (#28687)
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2026-06-23 14:48:35 -07:00 |
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Liangsheng Yin
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6c5f466023
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[server_args] Reland FA4 page_size auto-force for combined --attention-backend fa4 (#28976)
|
2026-06-23 14:21:59 -07:00 |
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Xinyuan Tong
|
0c6e8e9477
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Expand parser auto detection coverage (#28449)
|
2026-06-23 12:26:37 -07:00 |
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karverma-amdandCursor
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e0dc8b7137
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[AMD] Fuse topk padded-token masking into a single Triton kernel (#28084)
Co-authored-by: Cursor <cursoragent@cursor.com>
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2026-06-23 11:15:12 -07:00 |
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