 EchOandGuanyi Chen
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ca8ff035c3
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fix(hicache): isolate decode offload state per request (#37026)
Co-authored-by: Guanyi Chen <939416532@qq.com>
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2026-08-29 18:15:05 -07:00 |
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karverma-amd
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fbecd75c83
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[AMD] fix: do not emit a shared-expert marker twice on the per-rank slot path (#36515)
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2026-08-29 18:09:33 -07:00 |
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Liangsheng Yin
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9a489f8d2f
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[Test] Move gpqa and aime25 onto sgl-eval, drop unused eval paths (#36979)
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2026-08-29 17:36:13 -07:00 |
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Neeraj KashyapandBaizhou Zhang
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032fe91bf1
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Handle unlimited tokenizer context lengths (#37054)
Co-authored-by: Baizhou Zhang <sobereddiezhang@gmail.com>
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2026-08-29 17:29:11 -07:00 |
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f60bc73c58
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[Spec] Fix Dspark and Dflash state divergence across TP rank (#33614)
Co-authored-by: hnyls2002 <lsyincs@gmail.com>
Co-authored-by: Liangsheng Yin <hnyls2002@gmail.com>
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2026-08-29 17:27:43 -07:00 |
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a1fe4e30a9
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[Kernel] Fix SM90 FP8 decode regression with benchmarked M/K/N routing (#37018)
Co-authored-by: John Doe <johndoe@example.com>
Co-authored-by: BBuf <1182563586@qq.com>
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2026-08-29 16:59:30 -07:00 |
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Alex NailsandClaude Opus 5
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00fbb6e8ac
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[Perf] Tune the W4AFP8 DeepEP low-latency requant launch geometry (#35760)
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
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2026-08-29 16:03:01 -07:00 |
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3a0f1a1344
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[NPU] fix: reach torch>=2.8 CUDA memory-pool APIs lazily via torch._C (#29100)
Co-authored-by: Alex Nails <alex.nails@radixark.ai>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
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2026-08-29 15:55:14 -07:00 |
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Junlin Wu
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09ecb9aaaa
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📝 [NPU] Use vendor-neutral wording in quantization comments (#36768)
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2026-08-29 23:05:35 +03:00 |
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6afb5e1771
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Gate the idle-loop tree-cache sanity check behind a default-off env (#36205)
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
Co-authored-by: hzh0425 <hzh0425@apache.org>
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2026-08-30 00:10:28 +08:00 |
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Mick
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b24bd44556
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[diffusion] feat: avoid direct GPU parameter copies (#36832)
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2026-08-29 22:43:25 +08:00 |
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HZYandZhangheng
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cdbfe90b4a
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[HiCache] Align chunked CUDA host registrations (#36798)
Co-authored-by: Zhangheng <hzh0425@apache.org>
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2026-08-29 20:36:12 +08:00 |
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Cheng WanandClaude Opus 5
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4d53767b09
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config: the lazy imports that buy nothing become eager (#36975)
Co-authored-by: Claude Opus 5 <noreply@anthropic.com>
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2026-08-29 04:21:54 -07:00 |
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Cheng WanandClaude Opus 5
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f0d621cfa6
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config: the dead record parameters go (#36974)
Co-authored-by: Claude Opus 5 <noreply@anthropic.com>
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2026-08-29 04:20:55 -07:00 |
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Cheng WanandClaude Opus 5
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1a3e152f03
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config: six more runtime readers ask the bags (#36973)
Co-authored-by: Claude Opus 5 <noreply@anthropic.com>
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2026-08-29 04:19:14 -07:00 |
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Cheng WanandClaude Opus 5
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b65e677e48
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config: the resolution callbacks into the record go to zero (#36972)
Co-authored-by: Claude Opus 5 <noreply@anthropic.com>
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2026-08-29 04:18:05 -07:00 |
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Cheng WanandClaude Opus 5
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48b88e1256
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config: the resolution pipeline's dispatcher leaves the record (#36896)
Co-authored-by: Claude Opus 5 <noreply@anthropic.com>
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2026-08-29 04:16:25 -07:00 |
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Joe RowellandJimmy Shong
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46ccd7ce3e
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Add Laguna-XS-2.1 / S-2.1 NVFP4 nightly gsm8k tests (#35547)
Signed-off-by: Joe Rowell <joe@poolside.ai>
Co-authored-by: Jimmy Shong <69131491+Jiminator@users.noreply.github.com>
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2026-08-29 03:34:46 -07:00 |
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Zhiqiang Xie
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a328c19c81
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[HiCache] buffer mode: decide staged-fetch fate against the live tree (#36834)
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2026-08-29 01:51:47 -07:00 |
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Joel Gustafsonandmmangkad
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0a585d5bb1
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[BugFix] Allow model_loader_extra_config with remote_instance + modelexpress backend (#34639)
Signed-off-by: joeltg <joel@reflection.ai>
Co-authored-by: mmangkad <176301910+mmangkad@users.noreply.github.com>
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2026-08-29 00:43:10 -07:00 |
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silencejade
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78eef34356
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[NPU] [BugFix] Fix discontinuous input for FIA operator in GLM4.7‑Flash (#36170)
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2026-08-29 00:03:05 -07:00 |
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Liangsheng Yin
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24a3a63e6b
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[misc] Keep req.kv non-optional and key KV ownership on req_pool_idx (#36958)
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2026-08-28 23:47:42 -07:00 |
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Xiaoyu Zhang
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0e1146d04f
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[diffusion] optimization: optimize Pi0.5 inference and bounded graph serving (#34599)
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2026-08-29 14:47:32 +08:00 |
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王鹤男andMick
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f8f501f2e8
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[diffusion] fix: fix nvfp4 diffusion models on sm_120 (RTX PRO 6000 / RTX 50xx) (#35739)
Co-authored-by: Mick <mickjagger19@icloud.com>
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2026-08-29 14:42:49 +08:00 |
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Mick
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fa474b0441
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[diffusion] fix: fix image encoder parallel folding proposal (#36863)
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2026-08-29 14:34:36 +08:00 |
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Mick
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f5319af1c9
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[diffusion] chore: honor explicit component offload (#36931)
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2026-08-29 14:29:57 +08:00 |
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Mick
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d1ce017665
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[diffusion] feat: delegate recognized quantized components to transformers (#36902)
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2026-08-29 14:26:50 +08:00 |
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Mick
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3c1d77be21
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[diffusion] feat: respect component weight overrides for upsamplers (#36874)
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2026-08-29 14:23:11 +08:00 |
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Mick
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f93b48c627
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[diffusion] refactor: resolve indexed component weight sets (#36883)
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2026-08-29 14:21:25 +08:00 |
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zijiecandjacky.cheng
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7f2ee22b70
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[AMD] Fix eager metadata for AITER EAGLE draft extend (#36915)
Co-authored-by: jacky.cheng <yichiche@amd.com>
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2026-08-28 22:56:38 -07:00 |
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24c9251ac5
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[AMD][Spec][PD] Enable the PD DSA fused-TopK seed remap on ROCm (#36714)
Co-authored-by: Tianxiao Jiang <tianxiaojiang@Tianxiaos-MacBook-Pro.local>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
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2026-08-28 22:34:23 -07:00 |
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Liangsheng Yin
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ec962fd12d
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[Fix] Fall back to the process-group broadcast for DSA topk when PyNCCL is absent (#36963)
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2026-08-28 22:20:35 -07:00 |
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Eric Zhang
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3904b309db
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Add configurable HTTP/2 connection window (#36920)
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2026-08-29 13:18:42 +08:00 |
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3760296be8
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[PD] Pack DCP1→DCP-N PD KV transfers into dest-contiguous RDMA blocks (#35762)
Co-authored-by: Cursor <cursoragent@cursor.com>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
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2026-08-28 21:41:30 -07:00 |
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+8
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5f216fc33f
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qwen 3.8 rebase (#35758)
Co-authored-by: cherichy <cherichy@outlook.com>
Co-authored-by: guangyunh-nv <guangyunh@nvidia.com>
Co-authored-by: jiahanc <jiahanc@nvidia.com>
Co-authored-by: jinyangyuan-nvidia <joyuan@nvidia.com>
Co-authored-by: Cheng Hang <chang@nvidia.com>
Co-authored-by: Yicheng Qiang <yqiang@nvidia.com>
Co-authored-by: Sam Li <lsam@nvidia.com>
Co-authored-by: Tom-Zheng <tizheng@nvidia.com>
Co-authored-by: Yangmin Li <yangminl@nvidia.com>
Co-authored-by: xiaoweiw-nv <xiaoweiw@nvidia.com>
Co-authored-by: Zheng Li <lizheng.cs@zju.edu.cn>
Co-authored-by: yizhang2077 <1109276519@qq.com>
Co-authored-by: Ke Bao <ispobaoke@gmail.com>
Co-authored-by: Xinyuan Tong <115166877+JustinTong0323@users.noreply.github.com>
Co-authored-by: Yuhao Yang <47235274+yhyang201@users.noreply.github.com>
Co-authored-by: Zijie Xia <zijie.xia@radixark.ai>
Co-authored-by: github-actions[bot] <41898282+github-actions[bot]@users.noreply.github.com>
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2026-08-28 20:41:34 -07:00 |
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zhaozx-cn
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ca8cc101b8
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[NPU] add causal conv1d for ascend kda backend (#35021)
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2026-08-29 11:39:45 +08:00 |
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Chunyuan WU
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92b0d447b0
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[CPU] Fix wrongly causal-masked bidirectional attention (#35434)
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2026-08-28 19:49:43 -07:00 |
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Liangsheng Yin
|
0df69849ba
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[Fix] Drop the duplicated DSpark draft sample_block call (#36934)
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2026-08-28 18:10:41 -07:00 |
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Aurick Qiao
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7276a30c45
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[Fix] Support LSE on the RadixAttention extra-kwargs graph path (#35453)
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2026-08-28 18:04:00 -07:00 |
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Olga Miroshnichenko
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36afd70f9c
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[ROCm][Bugfix] Use token-level KV indices in the aiter ASM context-prefill gather (#36852)
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2026-08-28 17:17:18 -07:00 |
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valechenandHAI
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4944e50e2c
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[AMD] Add Work-Centric (Lean) Attention: a persistent-CTA decode kernel for long-context serving (#33576)
Signed-off-by: Valerie Chen <valechen@amd.com>
Co-authored-by: HAI <hixiao@gmail.com>
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2026-08-28 17:00:44 -07:00 |
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Xiaoyu Zhang
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db6f0a9d53
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Refactor JIT kernel and expert-pack directory layout (#36704)
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2026-08-29 07:41:25 +08:00 |
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Xiaoyu Zhang
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50bc1a3767
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[diffusion] Keep Cosmos3 Nano resident on 96 GB GPUs (#36641)
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2026-08-29 07:40:46 +08:00 |
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Gregory Leleytner
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e1b3bba3cc
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[Kernel] Route large SM90 row/column-scaled FP8 GEMMs to Torch (#34318)
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2026-08-29 07:35:37 +08:00 |
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Xiaoyu Zhang
|
96a4dcdde8
|
[CI] Slim JIT kernel unit tests (#36887)
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2026-08-29 07:26:49 +08:00 |
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Cheng Wan
|
d12b313b93
|
fix: KT's last MoE layer stops deferring experts again (#36921)
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2026-08-28 15:05:08 -07:00 |
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Liangsheng Yin
|
60f6d77a98
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[mem_cache] Carry swa_evicted_seqlen into SWARadixCache.cache_unfinished_req (#36909)
|
2026-08-28 14:29:27 -07:00 |
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Jonny Kongandjonnykong
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4d78d59e51
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[MoE] Make simulated expert routing support DP>1, and fuse into one triton kernel (#29718)
Co-authored-by: jonnykong <jonnykong@fb.com>
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2026-08-28 14:22:45 -07:00 |
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Liangsheng Yin
|
f65b2b2b15
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[Fix] Lazy-import aiter in DSv4 paged_decode to unbreak CPU CI (#36914)
|
2026-08-28 14:16:53 -07:00 |
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karverma-amd
|
2a96ebf648
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[AMD][DSV4] perf: retune decode split-K heuristic for MI355X (#36094)
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2026-08-28 13:48:41 -07:00 |
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