Commit Graph
17950 Commits
Author SHA1 Message Date
Liu Ziming beecfda314 [observability] Fix missing e2e/decode/inference latency span attributes (#37789) 2026-09-08 22:50:55 +08:00
15ff470472 [diffusion] chore: key the VAE decode-dtype store by module layout (#38496)
Co-authored-by: Mick Qian <mickqian@radixark.ai>
Co-authored-by: Claude Opus 5 <noreply@anthropic.com>
2026-09-08 22:37:21 +08:00
HZY a6b542813f fix(glm-5.2-nvfp4): bound Mooncake synchronous transfer batches (#32758) 2026-09-08 22:14:33 +08:00
SovietPowerandXiaoyu Zhang 4df5df911b [Scheduler] Add HRRN schedule policy to significantly reduce TTFT (#32911)
Co-authored-by: Xiaoyu Zhang <1182563586@qq.com>
2026-09-08 22:14:03 +08:00
Po-Han Huang (NVIDIA) 5097f9ac95 Disable Hopper GLM shared-expert fusion for modelopt_fp4 Marlin (#37325) 2026-09-08 06:16:36 -07:00
pllimax 2d339ddef1 [NPU] Phase A calibration: full GSM8K eval for dp_attention mixed-chunk (#38422) 2026-09-08 21:14:48 +08:00
Xiaoyu Zhang 554f817948 [Diffusion] Optimize LTX-2 QKNorm and split RoPE on Hopper (#38396) 2026-09-08 19:05:02 +08:00
88a9bfd1ff [diffusion] CI: add per-case timing tolerance for host-I/O-bound perf guards (#38457)
Co-authored-by: Mick Qian <mickqian@radixark.ai>
Co-authored-by: Claude Opus 5 <noreply@anthropic.com>
2026-09-08 18:40:17 +08:00
zijiecandZijie Chen e634ba78a4 [AMD] gfx950 assembly attention for EAGLE verify, draft extend and decode (#37465)
Co-authored-by: Zijie Chen <300606707+zijiecode@users.noreply.github.com>
2026-09-08 03:10:09 -07:00
amd-danli103 141febf329 [AMD] fix: use the hardware fp8 e4m3 convert on gfx950 (#37140)
Signed-off-by: amd-danli103 <danli103@amd.com>
2026-09-08 03:01:53 -07:00
775f17b07c [diffusion] optimization: stream mapped weights on a shared host/device pool (#38441)
Co-authored-by: Mick Qian <mickqian@radixark.ai>
Co-authored-by: Claude Fable 5.1 <noreply@anthropic.com>
2026-09-08 17:52:52 +08:00
vorapolsiloai 7edcdd5ae6 [AMD] Skip AITER FP8 ASM prefill when GQA is unsupported (#38467) 2026-09-08 02:49:47 -07:00
Hank Han ccfa120dae Fix DSA compression tail capacity for PD decode request slots (#38417) 2026-09-08 01:50:07 -07:00
DavidLiandClaude Opus 5 5ae4ccb0fd [Bench] Amortize the GDN ReplaySSM decode latency over the flush cycle (#38399)
Co-authored-by: Claude Opus 5 <noreply@anthropic.com>
2026-09-08 16:38:01 +08:00
YC Yen-Ching TsengandChen 4c3d47f1df [AMD] Copy MoE weight views before H2D in slow-loading nightlies (#38456)
Co-authored-by: Chen <bingxche@amd.com>
2026-09-08 16:19:28 +08:00
cen121212 f8f03910f2 【NPU】Support EAGLE when PP enabled in prefill nodes (#32207) 2026-09-08 15:45:36 +08:00
Rain Jiang b83a59835d sglang-server remove opaque type (#38095) 2026-09-08 00:41:31 -07:00
Sage 5aab054ec8 [rust-server] fix p/d bootstrap across dp listeners (#36234) 2026-09-08 13:22:32 +08:00
Shuwen Wang da1c017ae8 [CI] test: initialize disable_radix_cache in scheduler stub (#38418) 2026-09-08 13:15:47 +08:00
Shuwen Wang 61d501427d fix: make dfs weight ordering iterative (#38313) 2026-09-08 05:10:22 +00:00
Anupa Sajikumar 91a45ea37e [Intel][XPU][LoRA] Enable LoRA on Intel XPU (#30345) 2026-09-08 12:46:41 +08:00
Duyi-Wang 80e9a4ec74 [AMD] [Docker] Update MoRI to v1.2.3 (#38411) 2026-09-07 21:24:43 -07:00
Liwansiandsglang-npu-bot 92371e9887 PD disaggregation, isolated transfer, prefill OOM fixed. (#38094)
Co-authored-by: sglang-npu-bot <sglangnpu@163.com>
2026-09-08 11:44:35 +08:00
Wuhen Duan dfd9b5c2a4 [NPU] Enable non-greedy MTP sampling (#32495) 2026-09-08 11:18:01 +08:00
Liangsheng Yin 28ebede865 [mem_cache] Free hybrid SWA pages by one representative per page on page_size > 1 (#38159) 2026-09-07 20:15:54 -07:00
Liangsheng Yin b23d835048 [Scheduler] Unify per-iteration request intake into ingest_requests() (#38389) 2026-09-07 20:02:02 -07:00
Xinguo Zhu 2bf04f3a67 [Diffusion][CPU] Enable MiniMax-H3 on Xeon CPU (#35147) 2026-09-08 10:56:42 +08:00
huangtingwei 73c4cdb795 update codeowners (#38394) 2026-09-08 10:54:26 +08:00
EdwardXuyandEdwardXuy 7d2d6624b1 [NPU] Enable L1 prefix cache for Kimi-K3 W4A8 accuracy test (gpqa) (#38125)
Co-authored-by: EdwardXuy <EdwardXuy@users.noreply.github.com>
2026-09-08 10:39:58 +08:00
Polisetty V R K Jyothendra Varma cf35384fe4 [Intel GPU] Add MLA support to Intel XPU Attention backend for Prefill (#35866)
Signed-off-by: P V R K Jyothendra Varma <polisetty.v.r.k.jyothendra.varma@intel.com>
2026-09-08 10:29:28 +08:00
HZY 8656901504 [Fix][DSA] Bound prefill Triton specializations for page-table stride (#37093) 2026-09-08 10:23:51 +08:00
Chao Shiandhuangtingwei9988 e31e5319a0 HiCache: Reduce the number of all_reduce in check_hicache_events for PP (#37562)
Co-authored-by: huangtingwei9988 <huangtingwei.htw@antgroup.com>
2026-09-08 10:13:22 +08:00
fba967ed9c [diffusion] Support diffusion decoder parallel tiling for LTX-2.5 (#36026)
Co-authored-by: Claude Opus 5 <noreply@anthropic.com>
Co-authored-by: Mick Qian <mickqian@users.noreply.github.com>
2026-09-08 10:01:06 +08:00
Siju Samuel 2358916d5a [Feature][Intel XPU] Add memory saver support for Intel XPU via upstream torch_memory_saver (#29935) 2026-09-08 09:38:51 +08:00
Liangsheng Yin b8a81f055d [CI] Replace the Lark queue-digest card with a daily queue-timeline chart (#38380) 2026-09-07 18:28:34 -07:00
qyb233 c72cae201e [NPU] Fix ViT graph key layout handling (#37758) 2026-09-08 09:21:02 +08:00
5aa913e156 [AMD][GLM-5.2] Keep GlmMoeDsa MoE e_score_correction_bias in fp32 (#37133)
Co-authored-by: JohnQinAMD <yanyuan.qin@amd.com>
Co-authored-by: Thomas Wang <thomawan@amd.com>
Co-authored-by: Zhang, Jiejing <jiejing.zhang@amd.com>
2026-09-07 18:17:54 -07:00
Kedar PotdarandPo-Han Huang f4bbf12423 docs(cookbook): Qwen3.5 FP8 on B200/B300 — trtllm-gen MoE + symm mem (#38374)
Co-authored-by: Po-Han Huang <pohanh@nvidia.com>
2026-09-08 09:12:49 +08:00
Kamil 792543f98c [Scheduler] Make request-timeout aborts rank-consistent to fix TP collective hangs (#37143) 2026-09-07 18:01:25 -07:00
Liangsheng Yin 4dcecc7891 Revert "[kernel] add fused silu mul quant fp8" (#38381) 2026-09-07 17:36:10 -07:00
Ziang Li 20ca564bf7 Add zianglih as online NVFP4 and DSA Top-K code owner (#33624) 2026-09-07 16:08:11 -07:00
Baizhou Zhang 85d39401c8 [CP V1 Deprecation 3.5/5] Deprecate HIP/NPU/MUSA prefill CP and remove legacy implementation (#38293) 2026-09-07 15:39:34 -07:00
f4b75b5c36 docs(cookbook): Qwen3.8-Flash-Next NVFP4 recipes for DGX Spark (1x, 2x) and RTX PRO 6000 (#37995)
Co-authored-by: Jiminator <rdxa@rdxa-int-spark-01.yvb.moe>
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
2026-09-07 15:33:03 -07:00
Bingxu Chen 5a5d8e47c5 [AMD][CI] Remove obsolete split-dim check from Kimi-K3 prefill test (#38288) 2026-09-07 14:42:53 -07:00
amd-danli103andThomas Wang e9e9e37ddc [AMD] Restore SWA reprefill-tail on UnifiedRadixCache when HiCache is off (#32759)
Co-authored-by: Thomas Wang <thomawan@amd.com>
2026-09-07 14:27:53 -07:00
570087ceda [AMD][DSV4] Reland unified-KV pool sizing and SWA ring accounting, fully gated (#38192)
Co-authored-by: hnyls2002 <lsyincs@gmail.com>
Co-authored-by: Liangsheng Yin <hnyls2002@gmail.com>
2026-09-07 13:13:04 -07:00
jiaryang 6287ebf43a [AMD] Fix EAGLE crash when no kv_index_translator is bound on the DSA fp8 read door (#38318) 2026-09-07 13:03:10 -07:00
Mohammad Miadh AngkadandMohammad Angkad a711785475 [Kernel] Drop the vendored dense BF16 GEMM port in favor of FlashInfer 0.6.18 (#38124)
Co-authored-by: Mohammad Angkad <mohammad.angkad@radixark.ai>
2026-09-07 12:59:33 -07:00
bf68369a18 [ray] Support Ray metric backend for engine metrics (#31415)
Signed-off-by: Jeffrey Wang <jeffreywang@anyscale.com>
Co-authored-by: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
Co-authored-by: Qiaolin Yu <liin1211@outlook.com>
2026-09-07 12:43:19 -07:00
Aurick Qiao 8392c36bce [Bugfix][Mamba] Clear deferred init metadata before speculative decode (#37165) 2026-09-07 12:41:03 -07:00