 Артем Савкинandronnie_zheng
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bd523dd60d
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[NPU] [Bugfix] [Diffusion] Fixed gray images at the generation output (#23266)
Co-authored-by: ronnie_zheng <zl19940307@163.com>
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2026-04-25 10:20:38 +03:00 |
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Yujing
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6175946db7
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[Feature]Add MSProbe dump support in SGLang (#18349)
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2026-04-25 10:12:50 +03:00 |
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Yujun Dongandhzh0425
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21835fb0af
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[HiCache] Prevent move_hybrid_indices from polluting radix-tree node host state (#23427)
Co-authored-by: hzh0425 <hzh0425@apache.org>
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2026-04-25 14:27:42 +08:00 |
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82254bd9c5
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[JIT Kernel] Reland JIT activation (#22094)
Co-authored-by: Cheng Wan <54331508+ch-wan@users.noreply.github.com>
Co-authored-by: Cheng Wan <chwan@rice.edu>
Co-authored-by: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
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2026-04-24 23:00:28 -07:00 |
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ishandhananiandBaizhou Zhang
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0d224e5053
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update: b300 container for dsv4 (#23697)
Co-authored-by: Baizhou Zhang <sobereddiezhang@gmail.com>
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2026-04-24 22:59:20 -07:00 |
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YC Yen-Ching Tseng
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adc59325bc
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[AMD] Optimize MiniMax-M2.5 - enable fused Triton kernel for FP8 KV cache write in aiter decode path (#23620)
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2026-04-24 22:23:49 -07:00 |
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YC Yen-Ching Tseng
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fb272d27db
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[AMD] Optimize MiniMax-M2.5 - use aiter biased_grouped_topk for sigmoid scoring in MoE routing (#23611)
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2026-04-24 22:18:08 -07:00 |
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Shenxiu Liu
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8471c9ebe6
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Skip torch.cuda.empty_cache() in weight update flush path (#22998)
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2026-04-25 12:41:39 +08:00 |
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Baizhou Zhang
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69485a176c
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Small udpate gb300 recipe for deepseek v4 (#23690)
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2026-04-24 21:35:16 -07:00 |
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fzyzcjy
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8a395994ed
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docs(DeepSeek-V4): mark gb300|{small,big}|{cp,pd-disagg} verified + GB300-specific fixes (#23691)
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2026-04-25 12:21:57 +08:00 |
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fzyzcjy
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d2c61acf25
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docs(DeepSeek-V4): mark b200|small|pd-disagg + h200|small|{cp,pd-disagg} verified (#23689)
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2026-04-25 11:57:25 +08:00 |
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fzyzcjy
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fd401c2fb4
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docs(DeepSeek-V4): note SGLANG_FIX_DSV4_BASE_MODEL_LOAD for base models (#23684)
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2026-04-25 11:27:00 +08:00 |
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Yuhao Yangandtrangdough
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4a3fe2a091
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model: support parakeet nemotron encoder (#23568)
Co-authored-by: trangdough <trangtdo22@gmail.com>
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2026-04-25 11:00:23 +08:00 |
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Jackey Hua
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465abadd3c
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Add fused moe triton config for Qwen3.5-397B-A17B-FP8 (#23682)
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2026-04-24 18:35:32 -07:00 |
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Lianmin Zheng
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a4facdf3f6
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[CI] Refactor ci_install_dependency.sh into standalone functions (#23592)
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2026-04-24 17:39:39 -07:00 |
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shuwenn
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f30a6f4d7e
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[DOC] Add DFLASH speculative decoding documentation (#23553)
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2026-04-24 17:18:46 -07:00 |
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Xinyi Song
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76da28f6d6
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[AMD][bugfix] add gate rocm >= 7.2 for bpreshuffle (#23671)
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2026-04-24 13:26:16 -07:00 |
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jhchouuu
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f7e840682c
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[AMD][MoRI] bump MoRI to v1.1.1 (#23642)
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2026-04-24 13:12:20 -07:00 |
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Jia GuoandClaude Opus 4.6
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587fd15bd2
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perf: eliminate attention DtoD copy by passing pre-allocated output to FA (#21985)
Co-authored-by: Claude Opus 4.6 <noreply@anthropic.com>
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2026-04-24 12:05:16 -07:00 |
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6d03861476
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support Hy3 preview (#23533)
Co-authored-by: pengmeng <pengmeng@tencent.com>
Co-authored-by: Qiaolin-Yu <liin1211@outlook.com>
Co-authored-by: chengvjiang <chengvjiang@tencent.com>
Co-authored-by: russellfeng <russellfeng@tencent.com>
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2026-04-24 12:03:24 -07:00 |
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Lianmin Zheng
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6344b546c8
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Deprecate --collect-tokens-histogram, auto-collect with --enable-metrics (#23595)
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2026-04-24 12:00:16 -07:00 |
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Mick
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05696527ea
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[diffusion] feat: support LoRA for LTX2.3 (#23649)
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2026-04-25 01:52:41 +08:00 |
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baa0aa670f
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[HiCache & HybridModel] 3FS backend support DSA & mamba model (#23241)
Co-authored-by: 墨已 <kangyifei.kyf@alibaba-inc.com>
Co-authored-by: hzh0425 <hzh0425@apache.org>
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2026-04-25 00:48:01 +08:00 |
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Kangrui Du
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92d262f710
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[diffusion] RL: add per-step rollout options for SDE and trajectory capture (#23151)
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2026-04-24 23:26:16 +08:00 |
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Siju Samuel
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bca3dd958a
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[Intel GPU] Enable pipeline parallelism on XPU (#23645)
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2026-04-24 19:52:44 +08:00 |
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Yuwei AnandClaude Opus 4.6
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60bbb800db
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[Experimental] Breakable Piecewise Cuda Graph (#22218)
Signed-off-by: Oasis-Git <ayw.sirius19@gmail.com>
Co-authored-by: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
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2026-04-24 04:33:05 -07:00 |
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Mick
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b3b03369a5
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[diffusion] fix: unify LTX-2.3 HQ codepath gates for all LTX-2.3 variants (#23624)
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2026-04-24 17:44:08 +08:00 |
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YC Yen-Ching Tsengandbingxche
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b060a5ccfd
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[AMD] Fix nightly version tag selection (#23644)
Co-authored-by: bingxche <bingxche@amd.com>
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2026-04-24 17:39:47 +08:00 |
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Shangming Cai
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b8d883398d
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Revert "[Intel GPU] Enable pipeline parallelism on XPU" (#23641)
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2026-04-24 17:36:35 +08:00 |
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Ziang LiandBrayden Zhong
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1758856762
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[CI] Fix mxfp8 TrtllmGenMoe test (#23125)
Co-authored-by: Brayden Zhong <b8zhong@uwaterloo.ca>
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2026-04-24 09:02:11 +00:00 |
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fzyzcjy
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92bb5c6bbe
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Update pro fp8 checkpoint in DeepSeek V4 cookbook (#23634)
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2026-04-24 15:58:04 +08:00 |
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fzyzcjy
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3a620cb761
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Again update DeepSeek V4 cookbook (#23622)
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2026-04-24 15:12:35 +08:00 |
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zijiexia
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1a37e57fb1
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[codex] docs: note H200 DeepSeek-V4 checkpoint (#23628)
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2026-04-24 00:06:30 -07:00 |
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Hubert Lu
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4cb0c4e1f3
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[AMD] Fix memory access fault when --page-size > 1 with speculative decoding on AMD GPUs (#23596)
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2026-04-23 23:56:36 -07:00 |
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Mick
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cd1fa7506a
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[diffusion] model: support LTX2.3 high quality pipeline (#23366)
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2026-04-24 14:18:20 +08:00 |
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fzyzcjy
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734e1e2965
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Further update Deepseek V4 docs (#23617)
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2026-04-24 13:23:50 +08:00 |
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492883c8ca
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Add DeepSeek V4 cookbook (#23605)
Co-authored-by: fzyzcjy <ch271828n@outlook.com>
Co-authored-by: zijiexia <37504505+zijiexia@users.noreply.github.com>
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2026-04-23 22:10:28 -07:00 |
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YC Yen-Ching Tsengandbingxche
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30909cbeeb
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[AMD] upd local registry address (#23607)
Co-authored-by: bingxche <bingxche@amd.com>
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2026-04-24 12:07:09 +08:00 |
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Shaojun Zhou
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59724e90a9
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model: support Moss-VL (#23454)
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2026-04-24 11:14:29 +08:00 |
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Siju SamuelandShangming Cai
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bf98eb3ab7
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[Intel GPU] Enable pipeline parallelism on XPU (#23472)
Co-authored-by: Shangming Cai <csmthu@gmail.com>
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2026-04-24 10:41:51 +08:00 |
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b35213be11
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[MUSA][16/N] Add MUSA backend support for layers and DeepSeek models (V2/V3/R1) (#22774)
Co-authored-by: popsiclexu <zhenxue.xu@mthreads.com>
Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com>
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2026-04-23 18:59:51 -07:00 |
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Zaili Wang
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cbc2bee547
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[Intel CPU/XPU] SGL doc updates (#23547)
merge this one as doc change only.
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2026-04-24 09:23:27 +08:00 |
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Ma Mingfei
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23e4d381f0
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[CPU] remove RECORD_FUNCTION (#23528)
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2026-04-24 09:18:29 +08:00 |
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R0CKSTAR
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87e50f20f6
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[Apple Silicon][MLX] Cache seq_lens-derived tensors in BatchedDecodeContext (#23470)
Signed-off-by: Xiaodong Ye <yeahdongcn@gmail.com>
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2026-04-23 18:12:26 -07:00 |
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MARATRIXandAlex Nails
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74c2e5bacd
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[MUSA][8/N] Port CUDA kernels that are compatible with MUSA (#17946)
Signed-off-by: yafeng.li <yafeng.li@mthreads.com>
Co-authored-by: Alex Nails <alex.nails@radixark.ai>
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2026-04-23 18:04:58 -07:00 |
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Mick
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c0166355ae
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[diffusion] CI: minor refactor CI (#23576)
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2026-04-24 08:48:31 +08:00 |
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Cheng Wan
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d9c72bdd2b
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Skip unselected experts in flashinfer_trtllm (#23493)
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2026-04-23 17:30:19 -07:00 |
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Cheng WanandClaude Opus 4.7
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000a2525e1
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Move expert_mask_gpu from FusedMoE layer to StandardDispatcher (#23585)
Co-authored-by: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
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2026-04-23 17:17:27 -07:00 |
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Lianmin Zheng
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95d021b523
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Pre-set SWA cache location in CudaGraphRunner (#23552)
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2026-04-23 16:51:29 -07:00 |
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Lianmin Zheng
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bb962b0046
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Fix MoE no_combine: skip router weight in down projection (#23545)
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2026-04-23 16:47:58 -07:00 |
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