 ashwini rathi
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4f9b12c5dd
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[XPU] Guard tvm_ffi import in dsv4 compress modules under TYPE_CHECKING (#28426)
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2026-06-16 15:52:12 -07:00 |
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ashwini rathi
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fe887e6935
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test(xpu): add multi-feature and embedding stage-b tests (#27861)
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2026-06-12 14:36:28 +08:00 |
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ashwini rathi
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2a51479a91
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ci(xpu): pull intel/sglang-dev:latest and clean workspace properly (#27860)
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2026-06-11 13:14:56 +08:00 |
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6110ed671f
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ci(xpu): clean build artifacts in cleanup (#27648)
Co-authored-by: Patil, Jitendra <jitendra.patil@intel.com>
Co-authored-by: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
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2026-06-10 09:46:54 +08:00 |
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ashwini rathiandClaude Opus 4.7
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009a0ceefa
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[XPU CI] Re-enable stage B with docker-pull flow and split tests (#27526)
Co-authored-by: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
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2026-06-09 09:26:11 +08:00 |
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ashwini rathiandClaude Opus 4.7
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acf65c1c68
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[XPU CI] Pull prebuilt nightly image instead of building per-stage (#27282)
Co-authored-by: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
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2026-06-08 11:08:41 +08:00 |
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5c8a04ac4e
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[XPU CI] Expand stage-a and consolidate stage-b tests into stage-a (#27156)
Co-authored-by: vshekhawat-hlab <vshekhawat@habana.ai>
Co-authored-by: Ma Mingfei <mingfei.ma@intel.com>
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2026-06-04 12:00:25 +08:00 |
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