 jacky.cheng
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11c35b8433
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[AMD] Load fused shared experts for Qwen4-Exp and Qwen3.5 MTP (#38878)
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2026-09-17 19:56:31 +08:00 |
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jacky.chengandChangLiu0709
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a9bb4d7d45
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[AMD] Align Qwen3.5 MI355X HiCache cookbook with kernel / page_first (#39572)
Co-authored-by: ChangLiu0709 <cliu1004@amd.com>
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2026-09-16 11:22:28 +08:00 |
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jacky.cheng
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2f5cc8e33e
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[AMD] Align Qwen3.5 MI355X cookbook with AttnFP8-V2 and HiCache direct / page_first_direct (#39358)
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2026-09-14 12:46:17 +08:00 |
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jacky.chengandHAI
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d6fabb74b4
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[AMD][Fix] Fix aiter bpreshuffle GEMM for output sizes it cannot dispatch for qwen3.5 mxfp-attn-fp8-v2 TP4 (#37564)
Co-authored-by: HAI <hixiao@gmail.com>
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2026-09-12 23:11:44 -07:00 |
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jacky.cheng
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0bdc15d20f
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[AMD] Fix ROCm VAE Conv2D fast path breaking spatial-parallel decode (#34424)
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2026-09-05 01:00:25 -07:00 |
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jacky.cheng
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c967cd19b5
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[AMD] Optimize Qwen3.5 MTP unified attention on gfx950 (#36330)
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2026-08-27 00:13:49 -07:00 |
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jacky.cheng
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f775db03aa
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[AMD] Fix int32 seqused_k overflow in aiter draft-extend attention (#36541)
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2026-08-26 22:06:39 -07:00 |
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jacky.cheng
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6a81038317
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[AMD] Drop redundant FP8 bpreshuffle scale transpose via fused AR kernel (#33021)
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2026-08-25 02:49:57 -07:00 |
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jacky.cheng
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9eee990ce1
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[AMD] cookbook: add HiCache host-DRAM KV tier for Qwen3.5 MXFP4 on MI355X (#36245)
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2026-08-25 12:55:52 +08:00 |
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jacky.cheng
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0d5b5ae620
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[AMD] Fix Qwen3.5 MTP dropping fused shared-expert weights (#35719)
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2026-08-24 13:18:42 -07:00 |
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jacky.cheng
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0665740953
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[AMD][Fix] Route MoRI through the Qwen MoE all-to-all path (#32039)
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2026-08-24 13:04:08 -07:00 |
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jacky.cheng
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574274660f
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[AMD] cookbook: serve Qwen3.5 MXFP4 on MI355X with an fp8_e4m3 KV cache (#35445)
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2026-08-19 18:49:32 +08:00 |
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jacky.cheng
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6314e9e4f5
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[AMD][Fix] Qwen3.5: guard zero-grid launch in fused_qk_gemma_rmsnorm(_with_gate) (HIP invalid configuration on idle DP rank) (#31794)
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2026-08-15 21:02:54 -07:00 |
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jacky.chengandsogalin_codegen
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240a12b302
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[AMD] Fuse shared_expert_gate GEMV into the MoE append kernel (HIP/aiter) (#28666)
Co-authored-by: sogalin_codegen <39478626+sogalin@users.noreply.github.com>
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2026-08-13 21:32:27 -07:00 |
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jacky.cheng
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b7f87a2513
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[AMD][Perf] Fuse GatedDeltaNet QKVZBA split/reshape/cat into a single Triton kernel for Qwen3.5-architecture MoE on HIP (#34421)
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2026-08-13 00:18:35 -07:00 |
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jacky.cheng
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723c277640
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[AMD] [Fix] Enable aiter hd256 FP8 prefill FMHA on gfx950 (#33399)
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2026-08-04 02:40:33 -07:00 |
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jacky.cheng
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0d186f49be
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[AMD][Fix] Restore aiter-padded MoE weight dims for serialized checkpoints (#33090)
AMD only change
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2026-07-31 22:09:37 -07:00 |
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jacky.cheng
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833e1bc601
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[Fix][AMD] Qwen3.5 MoE: disable global-slot shared-expert fusion under per-rank EP backends (MoRI + dp-attention init crash) (#31793)
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2026-07-25 23:59:47 -07:00 |
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jacky.cheng
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17fdd8487f
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[AMD] Update qwen3.5 cookbook (#31737)
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2026-07-20 14:14:14 +08:00 |
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jacky.cheng
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e78051a419
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[AMD] [Fix] Fix --attention-backend triton work for DeepSeek MLA on MI355 (null-K + decode dispatch + RoPE) (#30355)
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2026-07-15 14:19:23 -07:00 |
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jacky.cheng
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96368a5f77
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[AMD] Fuse shared-expert sigmoid + bf16->fp32 cast into the MoE append kernel (3 kernels -> 1) (#28658)
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2026-07-08 02:34:20 -07:00 |
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jacky.cheng
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149fabcca7
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[AMD] Fuse sigmoid + mul into single Triton kernel for shared expert gating (#27636)
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2026-06-16 01:16:58 -07:00 |
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jacky.cheng
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22c7285a26
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[AMD] Fuse sigmoid + mul attention output gate into single Triton kernel (#27630)
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2026-06-11 02:05:05 -07:00 |
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jacky.cheng
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f4b3b99413
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[AMD] Enable fused GDN QKV split Triton kernel on HIP (#27583)
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2026-06-11 02:01:27 -07:00 |
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jacky.cheng
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0da18f8d91
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[AMD][Perf] Fuse QK RMSNorm + gate extraction Triton kernel for Qwen3.5 on HIP (#27656)
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2026-06-10 14:29:33 -07:00 |
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jacky.cheng
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2fef951fe8
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[AMD] Replace fp8 mla with fp8 mha kernel for diffusion model aiter backend (#23927)
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2026-06-09 14:46:41 -07:00 |
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jacky.cheng
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7aee2ff31b
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[AMD] Remove BF16-to-FP32 elementwise cast from compressor GEMM on HIP (#26914)
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2026-06-04 00:58:02 -07:00 |
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jacky.cheng
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1dd9432889
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[AMD] Fuse compress norm+rope+hadamard into single Triton kernel (#26894)
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2026-06-03 14:20:40 -07:00 |
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jacky.cheng
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f21d4868dc
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[AMD] Replace naive triton RMSNorm with aiter RMSNorm for diffusion model (#24360)
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2026-05-08 02:44:13 -07:00 |
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jacky.cheng
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76a1f169b3
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[AMD] Add AMD FP8 MLA attention test for Wan2.2-T2V-A14B (#23955)
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2026-05-08 01:03:51 -07:00 |
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jacky.cheng
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b22d3cd606
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[AMD] Support fp8 MLA for diffusion model (#20319)
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2026-05-08 00:56:24 -07:00 |
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jacky.chengandBingxu Chen
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180bb2624f
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[AMD] Fix CI RuntimeError: opentelemetry package is not installed (#23940)
Co-authored-by: Bingxu Chen <bingxche@amd.com>
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2026-04-29 18:02:44 +08:00 |
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jacky.cheng
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d95715ec65
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[AMD] Fix CI test_diffusion_generation[flux_2_image_t2i_2_gpus] (#23944)
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2026-04-28 23:06:29 +08:00 |
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jacky.cheng
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d283808457
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[AMD] Replace triton rotary_emb with aiter rotary_emb for Wan2.2 denoise (#22422)
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2026-04-09 18:21:02 -07:00 |
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jacky.cheng
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8ba992411d
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[AMD] Fix CI multimodal-gen-test-1-gpu-amd for gen model (#21621)
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2026-03-30 23:02:20 -07:00 |
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jacky.chengandHaiShaw
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c86f6c2831
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[AMD] Add peft>=0.18.0 to diffusion_hip deps for transformers 5.x compat for AMD diffusion model (#21442)
Co-authored-by: HaiShaw <hixiao@gmail.com>
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2026-03-28 20:28:05 -07:00 |
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jacky.cheng
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b4d3fb001d
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[AMD] Add fused GemmaRMSNorm forward_hip to use aiter/vllm kernels for qwen3.5 (#21188)
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2026-03-23 10:21:36 -07:00 |
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jacky.cheng
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1e2983c98e
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[AMD] Fix FP8 assertion failure in aiter MLA decode by falling back to self.k_scale (#19935)
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2026-03-12 01:48:51 -07:00 |
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jacky.cheng
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98f47d8175
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[AMD] Add Qwen3-Coder-Next accuracy and functionality test scripts for MI35x 8-GPU (#18608)
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2026-03-01 23:52:47 -08:00 |
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jacky.chengandyichiche@amd.com
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b2c46fc60b
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[AMD] Support Qwen3-Coder-Next on AMD platform (#18355)
Co-authored-by: yichiche@amd.com <jacky.cheng>
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2026-02-25 11:06:22 -08:00 |
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jacky.chengandyichiche@amd.com
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e138f7960a
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[AMD] Fix accuracy while using --enable-dp-attention (#19247)
Co-authored-by: yichiche@amd.com <jacky.cheng>
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2026-02-24 20:50:28 -08:00 |
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jacky.cheng
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8ac350f335
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[AMD] Support fused_rms_mxfp4_quant in the prefill stage for DeepSeek-R1-MXFP4 (#14975)
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2025-12-16 12:03:58 -08:00 |
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jacky.chengandyctseng0211
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eff7df6d0a
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[AMD] Enable fused shared expert append and flatten quant for fp8 deepseekR1 model (#13705)
Co-authored-by: yctseng0211 <yctseng@amd.com>
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2025-11-21 02:48:28 -08:00 |
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jacky.cheng
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99c92ff24b
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[AMD] Support a new flag to disable quant on parallelLinear layer if required (#11811)
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2025-10-22 19:16:15 -07:00 |
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jacky.cheng
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b00a0c786f
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[Fix] Update to v0.1.5.post4 and refine HIP attention backend selection (#11161)
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2025-10-02 21:19:30 -07:00 |
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jacky.cheng
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5991119541
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[Fix] Resolve performance drop in speculative decoding aiter backend (#11087)
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2025-09-29 23:51:30 -07:00 |
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jacky.cheng
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efb0de2c8d
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Update wave-lang to 3.7.0 and unify Wave kernel buffer options (#10069)
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2025-09-05 16:01:52 -07:00 |
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25caa7a8a9
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[AMD] Support Wave attention backend with AMD GPU optimizations (#8660)
Signed-off-by: Stanley Winata <stanley.winata@amd.com>
Signed-off-by: Harsh Menon <harsh@nod-labs.com>
Signed-off-by: nithinsubbiah <nithinsubbiah@gmail.com>
Signed-off-by: Ivan Butygin <ivan.butygin@gmail.com>
Signed-off-by: xintin <gaurav.verma@amd.com>
Co-authored-by: Harsh Menon <harsh@nod-labs.com>
Co-authored-by: Stanley Winata <stanley.winata@amd.com>
Co-authored-by: Stanley Winata <68087699+raikonenfnu@users.noreply.github.com>
Co-authored-by: Stanley Winata <stanley@nod-labs.com>
Co-authored-by: Ivan Butygin <ivan.butygin@gmail.com>
Co-authored-by: nithinsubbiah <nithinsubbiah@gmail.com>
Co-authored-by: Nithin Meganathan <18070964+nithinsubbiah@users.noreply.github.com>
Co-authored-by: Ivan Butygin <ibutygin@amd.com>
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2025-08-12 13:49:11 -07:00 |
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