Commit Graph
16596 Commits
Author SHA1 Message Date
Yuan Luoandluoyuan.luo b95a746948 [MoE] Fuse swiglu moe up gemm epilogue (#32944)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
2026-08-14 22:11:34 +08:00
Mohammad Miadh Angkad 9d2f1584fa Fix MiniMax-H3 Cache-DiT BCG warning (#34848) 2026-08-14 22:07:50 +08:00
c939307e8a [MiniMax-M3] Overlap shared and routed experts (#34542)
Co-authored-by: xuebi <xuebi@minimaxi.com>
Co-authored-by: Xiaoyu Zhang <1182563586@qq.com>
2026-08-14 22:01:48 +08:00
1a178f7c7c [EPD] Batch embedding cache host-device range copies (#31574)
Co-authored-by: 晟海 <huangtingwei.htw@antgroup.com>
Co-authored-by: liusy58 <liusy58@linux.alibaba.com>
Co-authored-by: Xiaoyu Zhang <1182563586@qq.com>
2026-08-14 22:01:12 +08:00
Brayden ZhongandBrayden Zhong 5e65dd01a7 Remove the torchao integration (--torchao-config) (#34304)
Co-authored-by: Brayden Zhong <brayden@radixark.ai>
2026-08-14 21:49:11 +08:00
amote-i fe0c18effd [NPU] [DOC] Add Qwen3.8-Max deployment tutorial on Ascend NPUs (#34836) 2026-08-14 20:02:04 +08:00
Ke Bao 18107e38d2 Skip oow slot freeing under eagle (#34823) 2026-08-14 17:13:21 +08:00
chilltongxandchilltongx 4d94f1d310 [diffusion] fix: warn when bcg disables cache-dit (#34242)
Co-authored-by: chilltongx <284668524+chilltongx@users.noreply.github.com>
2026-08-14 16:45:36 +08:00
Liangsheng Yin f2c84de022 [Perf] Publish the WAR read-done event at DSPARK verify (#34816) 2026-08-14 00:46:52 -07:00
triple-muandMick a86edcdc0a [diffusion] feat: rebuild minimax-h3 adaln outputs on demand (#34650)
Co-authored-by: Mick <mickjagger19@icloud.com>
2026-08-14 15:33:51 +08:00
2622e013eb [Fix] has_hf_quant_config crashes on local dirs without the config (#34774)
Co-authored-by: harmya <harmya@modal.com>
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
2026-08-14 07:17:42 +00:00
kk 65d62109dd [AMD] Fix Triton 3.7 gfx950 extend-attention spills (#34741) 2026-08-14 00:05:42 -07:00
Dayananda V 7c15b9b7d0 [diffusion] fix: fix cache-first fast path accepting a metadata-only snapshot (#34121) 2026-08-14 14:52:52 +08:00
datdo-msftandXiaoyu Zhang 827552bc1d Fix eager AMX backend probe imports (#34496)
Co-authored-by: Xiaoyu Zhang <1182563586@qq.com>
2026-08-14 14:44:14 +08:00
ba1d980b35 [AMD] Accelerate AITER unified-attention decode with scaled FP8 Q (#31856)
Co-authored-by: jacky.cheng <yichiche@amd.com>
Co-authored-by: YC Yen-Ching Tseng <yctseng@amd.com>
2026-08-13 23:42:25 -07:00
Mick 46d84f4b48 feat(cli): add extensible serve backend plugins (#34753) 2026-08-14 13:57:59 +08:00
zijiexiaandClaude Opus 5 463981922c [Cookbook] Add DeepSeek-V4-Pro-0813 (Pro Official) serving recipes (#34809)
Co-authored-by: Claude Opus 5 <noreply@anthropic.com>
2026-08-13 22:53:41 -07:00
b784726863 [kernel] Content-addressed JIT build cache, generated from our own ninja (#34274)
Co-authored-by: Claude <noreply@anthropic.com>
Co-authored-by: BBuf <1182563586@qq.com>
2026-08-14 13:41:04 +08:00
jacky.chengandsogalin_codegen 240a12b302 [AMD] Fuse shared_expert_gate GEMV into the MoE append kernel (HIP/aiter) (#28666)
Co-authored-by: sogalin_codegen <39478626+sogalin@users.noreply.github.com>
2026-08-13 21:32:27 -07:00
Baizhou Zhang 0a6bbbe128 [Fix] Restore layer-level DSV4 RoPE policy (#34788) 2026-08-13 21:26:45 -07:00
e1c4db9621 [quantization] Add tuned Triton tile configs for channelwise FP8 GEMM… (#34331)
Co-authored-by: runkai <runkai@amazon.com>
Co-authored-by: Xiaoyu Zhang <1182563586@qq.com>
2026-08-14 11:11:02 +08:00
Xinyuan Tongandhnyls2002 85cdf1178d [CI] Prune redundant CPU test overhead (#34309)
Co-authored-by: hnyls2002 <lsyincs@gmail.com>
2026-08-13 19:51:17 -07:00
Yuhao YangandClaude 6ad3f2d8fd docs: link dots3.note checkpoints, add H100 cells (#34797)
Co-authored-by: Claude <noreply@anthropic.com>
2026-08-14 02:42:27 +00:00
ashwini rathiandarathi-hlab 456c5551cc [XPU][test] Add cache_salt=None to _make_req in test_lmcache_radix_cache.py (#34728)
Co-authored-by: arathi-hlab <arathi.hlab@users.noreply.github.com>
2026-08-14 10:27:15 +08:00
SII-yangdianandSII-yangdian f2b2b567aa perf(jit_kernel/deepseek_v4): optimize paged_mqa_metadata (#25855)
Co-authored-by: SII-yangdian <yangdian@sii.edu.cn>
2026-08-13 19:00:22 -07:00
Xiaoyu ZhangandClaude Fable 5 704e512836 [GDN] Honor configured linear-attn verify backend in the kernel dispatcher (#34592)
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
2026-08-14 08:59:52 +08:00
Michael 34219ed9a7 [AMD] CI: pin antlr4-python3-runtime back after lmms-eval (unblocks ROCm 7.2 stage-b evals) (#34768) 2026-08-14 08:41:16 +08:00
Ziang Li 9d34c2809f [FlashInfer v0.6.16] Support FlashInfer CuTe DSL NVFP4 MoE quantization (#28354) 2026-08-13 17:33:46 -07:00
ormandj c4271c3fe1 [DSpark] Fix EP1 decode performance regression (#34759) 2026-08-13 17:00:54 -07:00
weireweireandweireweire 54c44fef73 [Perf] Skip trivial DSV4 nonpaged indexer logits (#33857)
Co-authored-by: weireweire <20922698+weireweire@users.noreply.github.com>
2026-08-13 16:21:30 -07:00
Liangsheng Yin 151a314829 [Fix] Make the DSpark draft num_token_non_padded host-to-device copy non-blocking (#34782) 2026-08-13 16:10:54 -07:00
zijiexia abdef3c38e [Qwen] Update Docker image tag for MI300X to v0.5.17-rocm700-mi30x-20… (#34770) 2026-08-13 15:59:42 -07:00
MichaelandMichael 9720922671 [AMD][CI] Restore gfx942 Grok-1 INT4 and Grok-2 schedules (#34761)
Co-authored-by: Michael <michaelzhang-ai@users.noreply.github.com>
2026-08-13 15:57:54 -07:00
Khoa PhamandClaude Opus 5 f3beb2c529 [CI] Disable the prefill CUDA graph on the P worker of test_kimi_linear_pd_dcp4 (#34779)
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
2026-08-13 15:26:21 -07:00
Khoa PhamandClaude Opus 5 81fe452810 [DCP] Share one pack kernel between both a2a backends (#34651)
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
2026-08-13 15:06:02 -07:00
Lianmin Zheng 8bbca87780 [Core] Organize environment variable registry (#34730) 2026-08-13 14:25:37 -07:00
Khoa PhamandCursor 652a2709d1 [Docs] Add decode context parallelism to advanced features (#34654)
Co-authored-by: Cursor <cursoragent@cursor.com>
2026-08-13 13:51:57 -07:00
jthomson04 903439044a perf(kv-events): coalesce cache events (#31479) 2026-08-13 13:36:53 -07:00
Liangsheng Yin 8554d9a5bc [Fix] Carry the backend on Kimi-K3 deferred preprocessing configs (#34766) 2026-08-13 13:30:33 -07:00
Lukas Humbel 8ad04a9bee docs(nixl): document OBJ throughput target (#30405) 2026-08-13 13:04:13 -07:00
kangwangamdandBingxu Chen 29b067245b [AMD] CI: drop the spaces from SGL_EVAL_SPEC (fixes ROCm 7.2 stage-a sgl-eval install) (#34689)
Co-authored-by: Bingxu Chen <bingxche@amd.com>
2026-08-13 12:48:58 -07:00
Mohammad Miadh Angkad 96db53ec70 [CI] Fix test_resolution_is_reproducible after cuda_ipc became opt-in (#34746) 2026-08-13 12:47:03 -07:00
6b94d39f13 [Model Loading] Overlap checkpoint staging with CUDA graph capture during startup (#32017)
Co-authored-by: Wenhui Zhu <wzhu59@asu.edu>
Co-authored-by: Alex Nails <alex.nails@radixark.ai>
2026-08-13 12:26:25 -07:00
Shangming Cai 0772e79ee7 [CI][PD] Pin nccl rendezvous port per side to fix flaky disaggregation tests (#34755) 2026-08-14 01:44:20 +08:00
jambow0320 a82f8e1777 [PD] Add the missing Prefill bootstrap timeout for NIXL (#34692) 2026-08-14 01:08:09 +08:00
69a31ce342 fix: make Cache-DiT actually cache on MiniMax-H3 (#33827)
Signed-off-by: YZLi <yuanli@nvidia.com>
Signed-off-by: yunch <yunch@nvidia.com>
Co-authored-by: YZLi <yuanli@nvidia.com>
Co-authored-by: Mick <mickjagger19@icloud.com>
Co-authored-by: Xiaoyu Zhang <1182563586@qq.com>
2026-08-14 00:39:58 +08:00
Xiaoyu Zhang c255fbc4fe [Diffusion] Add @triple-mu as a code owner (#34748) 2026-08-14 00:37:49 +08:00
triple-mu ea7a6e0e99 fix(diffusion): unshard FSDP root group for custom encoder entry points (#34575) 2026-08-13 23:24:00 +08:00
Xiaoyu Zhang ebca0bbde4 [Diffusion][ERNIE] Fuse QKNorm with full-width RoPE (#34620) 2026-08-13 23:23:21 +08:00
Xiaoyu Zhang 82f7afb881 [Diffusion] Make auto residency decisions component-scoped (#34615) 2026-08-13 23:20:55 +08:00