 Lianmin Zheng
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b0fd31ba07
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Multiple flexibility fixes for DP attention (#33537)
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2026-08-04 15:40:40 -07:00 |
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Baizhou Zhang
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6808c6d571
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[Tiny] Little enhancement of Kimi-K3 test (#33609)
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2026-08-04 15:36:41 -07:00 |
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Liangsheng Yin
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58da9859c4
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[CI] Extract download-rust-ext and give every install step a cache fallback (#33597)
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2026-08-04 15:33:34 -07:00 |
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Zhaoyi Li
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b327d76682
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[AMD] Bump mori to latest in sglang (#33462)
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2026-08-04 15:12:40 -07:00 |
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cctry
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c8822fd990
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Clarify post-capture KV reservation logs (#33598)
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2026-08-04 15:06:11 -07:00 |
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FilipandClaude Opus 4.8
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19d3f86895
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[LoRA] Laguna: per-layer LoRA hidden-dim resolution for packed attention (#30298)
Co-authored-by: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
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2026-08-04 14:48:05 -07:00 |
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Xinyuan TongandAlex Nails
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a9c3b55435
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[Refactor] Keep chat template validation out of ServerArgs dispatcher (#33392)
Co-authored-by: Alex Nails <alex.nails@radixark.ai>
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2026-08-04 14:45:47 -07:00 |
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Jimmy ShongandClaude Opus 5
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e510dc58ba
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Add @Jiminator as codeowner for Laguna model and config (#33472)
Co-authored-by: Claude Opus 5 <noreply@anthropic.com>
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2026-08-04 14:10:19 -07:00 |
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Lianmin Zhengandcctry
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34af3ff386
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Allow optimistic prefill with L2 hierarchical cache and write-back policy (#33545)
Co-authored-by: cctry <cctry@meta.com>
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2026-08-04 13:23:08 -07:00 |
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+26
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abddb1c7e9
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[Kimi] Support kimi-k3 (#32541)
Co-authored-by: DarkSharpness <76582120+DarkSharpness@users.noreply.github.com>
Co-authored-by: Xiaoyu Zhang <1182563586@qq.com>
Co-authored-by: Mick <mickjagger19@icloud.com>
Co-authored-by: Yuhao Yang <47235274+yhyang201@users.noreply.github.com>
Co-authored-by: Cheng Wan <54331508+ch-wan@users.noreply.github.com>
Co-authored-by: Ke Bao <ispobaoke@gmail.com>
Co-authored-by: Baizhou Zhang <sobereddiezhang@gmail.com>
Co-authored-by: Chunan Zeng <zcnrex@gmail.com>
Co-authored-by: Khoa Pham <khoa.pham@radixark.ai>
Co-authored-by: Ziyi Xu <ziyi.xu@radixark.ai>
Co-authored-by: Zijie Xia <37504505+zijiexia@users.noreply.github.com>
Co-authored-by: Yuwei An <ayw.sirius19@gmail.com>
Co-authored-by: zhangxiaohao <1024393531@qq.com>
Co-authored-by: Yangmin Li <yangminl@nvidia.com>
Co-authored-by: Julien Lin <jullin@nvidia.com>
Co-authored-by: Hao Phan <htphan@nvidia.com>
Co-authored-by: Thomas Wang <1am9trash@gmail.com>
Co-authored-by: RolaoDenthu <xinyisong0111@gmail.com>
Co-authored-by: pigeonsoup <32922982+pigeonsoup@users.noreply.github.com>
Co-authored-by: HaiShaw <hixiao@gmail.com>
Co-authored-by: Xinyuan Tong <115166877+JustinTong0323@users.noreply.github.com>
Co-authored-by: Pranjal Shankhdhar <pranjal.ssh@gmail.com>
Co-authored-by: Lee Nau <lee.nau@gmail.com>
Co-authored-by: HMING <126185151+Hearum@users.noreply.github.com>
Co-authored-by: elvischenv <219235043+elvischenv@users.noreply.github.com>
Co-authored-by: Byron Hsu <byronhsu1230@gmail.com>
Co-authored-by: Byron Hsu <byron+per@periodiclabs.ai>
Co-authored-by: Claude Opus 5 <noreply@anthropic.com>
Co-authored-by: Thomas Wang <thomawan@amd.com>
Co-authored-by: Xinyi Song <86638975+RolaoDenthu@users.noreply.github.com>
Co-authored-by: Mohammad Miadh Angkad <176301910+mmangkad@users.noreply.github.com>
Co-authored-by: Cheng Wan <cheng.wan@radixark.ai>
Co-authored-by: BBuf <xiaoyu.zhang@radixark.ai>
Co-authored-by: Hanming Lu <hanminglu@meta.com>
Co-authored-by: Xinyi Song <xinyis10@illinois.edu>
|
2026-08-04 13:22:49 -07:00 |
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Liangsheng Yin
|
0753663b8e
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[CI] Trim redundant B200 test registrations (#33586)
|
2026-08-04 13:22:00 -07:00 |
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Xingyu Liu
|
aa06433709
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Avoid TRTLLM prefill output copy (#33306)
|
2026-08-04 12:54:04 -07:00 |
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38dc2d6cf8
|
[metrics] Split tokenizer request metrics by stream (#32734)
Co-authored-by: wpc <wpc@devvm23443.cco0.facebook.com>
Co-authored-by: Lianmin Zheng <lianminzheng@gmail.com>
|
2026-08-04 12:53:52 -07:00 |
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Lianmin Zheng
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4794b401d5
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[Observability] Add startup, memory, and hybrid SWA diagnostics (#33375)
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2026-08-04 12:50:09 -07:00 |
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Lianmin ZhengandJialin Ouyang
|
5081c063c0
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fix(metrics): clear forward occupancy on idle (#33562)
Co-authored-by: Jialin Ouyang <Jialin.Ouyang@gmail.com>
|
2026-08-04 12:49:17 -07:00 |
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Lianmin ZhengandItai Gat
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dea2be5ae3
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[CUDA Graph] Allow custom decode graph runners (#33553)
Co-authored-by: Itai Gat <itaigat.mail@gmail.com>
|
2026-08-04 12:48:56 -07:00 |
|
|
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e76d0acdc9
|
migrate NPU PR/nightly test cases to a3-560T (#33346)
Co-authored-by: Claude <noreply@anthropic.com>
Co-authored-by: sglang-npu-bot <sglangnpu@163.com>
|
2026-08-05 01:17:58 +08:00 |
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Xiaoyu ZhangandClaude Fable 5
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95d0e57e83
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[diffusion] Fuse DiT FFN tanh-GELU into up-proj GEMM (cublasLt epilogue) behind quality=high (Qwen-Image 1024^2 denoise 12.36 -> 12.05 s on H200) (#33536)
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
|
2026-08-04 23:49:43 +08:00 |
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Xiaoyu Zhang
|
0d0c7d853f
|
[diffusion] FLUX.2 VAE decoder fast path behind quality=high (H200: 1024^2 97.6->29.2 ms, 2048^2 437.2->168.5 ms) (#33451)
|
2026-08-04 23:48:19 +08:00 |
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Lianmin Zheng
|
7adf2f4a9a
|
Inline _set_gc into _set_envs_and_config (#33538)
|
2026-08-04 07:31:56 -07:00 |
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Lianmin ZhengandYinghai Lu
|
d257b58e67
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[Router] Report accelerator count in /v1/loads (#33548)
Co-authored-by: Yinghai Lu <yinghai@meta.com>
|
2026-08-04 05:55:35 -07:00 |
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Lianmin Zheng
|
8f2a3ad6d7
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[mem_cache] Label HiCache host pools and clarify post-capture KV sizing logs (#33445)
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2026-08-04 04:21:36 -07:00 |
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jacky.cheng
|
723c277640
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[AMD] [Fix] Enable aiter hd256 FP8 prefill FMHA on gfx950 (#33399)
|
2026-08-04 02:40:33 -07:00 |
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Xingyu Liu
|
5e6c37f2b4
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[cuda_graph] Gate breakable-CG capture_inputs retention to DP-gather paths (#32678)
Signed-off-by: xingyuliu <charlotteliu12x@gmail.com>
|
2026-08-04 02:23:34 -07:00 |
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|
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b57721ccf7
|
Enable post-capture KV sizing with DP attention (#33427)
Co-authored-by: cctry <cctry@meta.com>
Co-authored-by: cctry <cctry@fb.com>
|
2026-08-04 02:20:24 -07:00 |
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Lianmin Zheng
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16d3b118a2
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Reduce startup log noise and fix Dynamo / CUDA-graph edge cases (#33428)
|
2026-08-04 02:19:56 -07:00 |
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Liangsheng Yin
|
b6d548afd7
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[Fix] Resolve VLM test image placeholders from the model's own chat template (#33509)
|
2026-08-04 02:01:39 -07:00 |
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|
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26a542722f
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[CI] Replace the rust-ext-build venv instead of failing when it exists (#33512)
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
Co-authored-by: hnyls2002 <lsyincs@gmail.com>
|
2026-08-04 01:56:16 -07:00 |
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YC Yen-Ching Tseng
|
eaf5c29cc5
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[AMD] Enable block-fp8 + quick INT4 all-reduce in MiniMax-M3 MI35x nightly Test (#33402)
|
2026-08-04 01:55:06 -07:00 |
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ashwini rathiandMa Mingfei
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53804d609c
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[CI][XPU] Stabilize XPU CI: pin UMD/IGC, retry infra flakes, right-size EAGLE3 (#32438)
Co-authored-by: Ma Mingfei <mingfei.ma@intel.com>
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2026-08-04 16:28:52 +08:00 |
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Kan WuandClaude Fable 5
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17d19081d9
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[mm] sglang-mm: server vision pipeline core (fetch/driver/pipeline) + Qwen VL (#32364)
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
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2026-08-04 00:47:00 -07:00 |
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Vladislav NosivskoyandXinyuan Tong
|
154f0ac662
|
Fix DSpark and DP/EP (#33098)
Signed-off-by: Vladislav Nosivskoy <vladnosiv@gmail.com>
Co-authored-by: Xinyuan Tong <115166877+JustinTong0323@users.noreply.github.com>
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2026-08-04 00:35:57 -07:00 |
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Alex NailsandClaude Opus 5
|
bfa4e4a57b
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[Nemotron] Hoist mamba track-mask host syncs out of the per-layer prefill path (#32589)
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
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2026-08-03 23:58:28 -07:00 |
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weireweireandweireweire
|
23ea7b6481
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Prewarm DSV4 MHC post kernel at model load (#30741)
Co-authored-by: weireweire <20922698+weireweire@users.noreply.github.com>
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2026-08-03 23:41:56 -07:00 |
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Liangsheng Yin
|
157401f050
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[CI] Build the Rust extensions on the 5090 pool and seed the cache from main (#33460)
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2026-08-03 23:33:20 -07:00 |
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TobyMintandMick
|
101bb2327c
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[diffusion] fix: fix local-path detection for MiniMax-H3 and other non-diffusers models (#33365)
Co-authored-by: Mick <mickjagger19@icloud.com>
|
2026-08-04 14:03:35 +08:00 |
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Rain Jiang
|
4494fb96b2
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refactor the tcp listener binding logic (#33420)
|
2026-08-03 22:10:52 -07:00 |
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Zhaoyi LiandChen
|
48dcadc770
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[AMD][DI][CI] 5/N Add DSV4 wide-EP16 4-node 2P1D nightly recipes (#31500)
Co-authored-by: Chen <bingxche@amd.com>
|
2026-08-03 22:08:00 -07:00 |
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Liangsheng YinandMick
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afc868517b
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[Perf] Speed up the Kimi-K2.5 vision path and match PIL bicubic in the GPU resize (#33349)
Co-authored-by: Mick <mickjagger19@icloud.com>
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2026-08-03 21:57:49 -07:00 |
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Liangsheng Yin
|
7ba393dd15
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[CI] Dispatch base-a-test-cpu through its own reusable stage workflow (#33461)
|
2026-08-03 20:49:23 -07:00 |
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Xiaoyu ZhangandClaude Fable 5
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c6f2a9c1d4
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[diffusion] Restrict request-level quality to two validated tiers: lossless (default) and high (#33453)
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
|
2026-08-04 11:43:16 +08:00 |
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Jinchen HanandMick
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614825fd38
|
[vla] fix: pi05 models does not apply scale factor for language embeddings (#33367)
Co-authored-by: Mick <mickjagger19@icloud.com>
|
2026-08-04 11:25:54 +08:00 |
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Mick
|
b058dc9106
|
[diffusion] fix: reject ring parallelism where it would silently miscompute (#33353)
|
2026-08-04 11:15:23 +08:00 |
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Mohammad Miadh Angkad
|
7dd8a3d5ea
|
[CI] Fix scheduler max new tokens test fixture (#33467)
|
2026-08-03 20:12:21 -07:00 |
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|
EchO
|
1e64fc1563
|
[Fix] Honor FlashMLA natural-log LSE in DCP reduction (#33065)
|
2026-08-03 19:55:52 -07:00 |
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Khoa Pham
|
91fae8a72c
|
[DCP] Bound a request by the aggregate KV pool, not one rank's share (#33448)
|
2026-08-03 19:36:25 -07:00 |
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Oguz UlgenandCheng Wan
|
c113ead98a
|
Bump helion version to 1.4 (#32562)
Co-authored-by: Cheng Wan <54331508+ch-wan@users.noreply.github.com>
|
2026-08-03 19:10:31 -07:00 |
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Yuwei AnandClaude Opus 5
|
92087ef4d2
|
fix(mem_cache): state the MLA KV bound in the DCP index space (#33432)
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
|
2026-08-03 19:07:49 -07:00 |
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Baizhou Zhang
|
eb31a53338
|
Revert "Add flashinfer rmsnorm + quant fusion support SM90, SM100, SM120" (#33455)
|
2026-08-03 19:03:56 -07:00 |
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Liangsheng Yin
|
cdff33d738
|
[CI] Build the Rust extension modules once per run instead of in every CUDA job (#33384)
|
2026-08-03 18:56:48 -07:00 |
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