 AMD-yanfeiwang
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2ded8a6aea
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[AMD] Enable moe_a2a_backend=mori for DeepSeek-V4 prefill context parallelism (#35611)
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2026-08-27 02:31:41 -07:00 |
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AMD-yanfeiwang
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cbfe54fba8
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[AMD] Use fast exponentials in C4 and C128 ROCm kernels (#34296)
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2026-08-26 19:49:01 -07:00 |
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AMD-yanfeiwang
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24bce93c93
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[AMD][MORI] Deduplicate CP-replicated state transfers (#36025)
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2026-08-24 14:43:52 -07:00 |
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AMD-yanfeiwangandZhangheng
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a34f81251f
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fix(hicache/umbp): support DeepSeek-V4 hybrid HostPoolGroup (multi-po… (#30762)
Co-authored-by: Zhangheng <hzh0425@apache.org>
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2026-08-13 15:40:07 +08:00 |
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AMD-yanfeiwang
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ca0f8a0f4c
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perf(hisparse): fuse the DSv4 value and scale swap-in copy on ROCm (#33484)
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2026-08-10 14:30:15 -07:00 |
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AMD-yanfeiwang
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1a8e4876b6
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perf(hisparse): 128-bit non-temporal swap-in copy on ROCm (#33085)
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2026-08-10 13:27:15 -07:00 |
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AMD-yanfeiwang
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a3194d3585
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[AMD] Remove ROCm page_first+kernel -> layer_first HiCache fallback (follow-up to #28534) (#30622)
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2026-07-14 22:48:16 -07:00 |
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AMD-yanfeiwangandDuyi-Wang
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d74619b373
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[AMD] Enable JIT staged HiCache write-back and fix CPU-index crash (#28534)
Co-authored-by: Duyi-Wang <duyi.wang@amd.com>
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2026-07-09 01:22:37 -07:00 |
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AMD-yanfeiwang
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5141d8ae21
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[AMD]fix: use CUDA event for targeted draft-to-verify sync in EAGLE overlap (#21940)
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2026-04-26 21:58:34 -07:00 |
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AMD-yanfeiwang
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966ae87d02
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[AMD] avoid correction_bias_dtype dtype convert (#20692)
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2026-03-17 02:55:05 -07:00 |
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AMD-yanfeiwangandDuyi-Wang
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f0153ad225
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[AMD][Feature] support fp4 dispatch and fp8 combine in moriep (#19757)
Co-authored-by: Duyi-Wang <duyi.wang@amd.com>
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2026-03-09 12:52:05 -07:00 |
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AMD-yanfeiwangandroot
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f69ca93d49
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[AMD] remove redundancy H2D op in aiter attention backend (#19416)
Co-authored-by: root <root@mia1-p01-g28.mia.tensorwave.lan>
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2026-02-27 02:15:55 -08:00 |
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