 MickandClaude Opus 5
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ab9750fb35
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[diffusion] optimization: pin layerwise host stores in place at their exact size (#39021)
Co-authored-by: Claude Opus 5 <noreply@anthropic.com>
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2026-09-11 22:04:40 +08:00 |
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Xinyuan Tong
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e8a36d339c
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Auto-detect GLM-5.3 chat templates as glm45/glm47 parsers (#38297)
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2026-09-11 09:02:44 -04:00 |
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MickandMick Qian
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358c163250
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[diffusion] fix: recover ipc jit initialization after interrupted builds (#39034)
Co-authored-by: Mick Qian <mickqian@users.noreply.github.com>
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2026-09-11 19:34:09 +08:00 |
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James
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165d8dd177
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[NPU][Hicache] Add Ascend Memcache Hicache L3 storage backend (#38827)
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2026-09-11 18:54:00 +08:00 |
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Liwansi
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747734dce4
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[NPU]glm5.2 fp8 memory opt (#38807)
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2026-09-11 18:48:45 +08:00 |
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Shangming Cai
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a4ff5634b8
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[CI] Add CI permissions for PP contributor stepinto (#39077)
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2026-09-11 18:04:57 +08:00 |
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Vincent Gao
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8e7deb329e
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[Router] Preserve global cache affinity with bucket routing (#38814)
Signed-off-by: Vincent Gao <vincentbo@linux.alibaba.com>
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2026-09-11 17:41:27 +08:00 |
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822e73ccdd
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[Unified Cache][AMD] Support DeepSeek-V4 unified KV in direct external linkers (#38269)
Co-authored-by: amd-danli103 <danli103@amd.com>
Co-authored-by: Duyi-Wang <duyi.wang@amd.com>
Co-authored-by: TianDi101 <tiandi920722@gmail.com>
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2026-09-11 01:49:29 -07:00 |
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Jensen
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0bae67648a
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[NPU] Change npu.Dockerfile working directory to /sgl-workspace (#38968)
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2026-09-11 11:30:07 +03:00 |
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Mohammad Miadh AngkadandMohammad Angkad
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ad5af539cd
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[CI] Trim DSV4 trtllm B200 tests (#39013)
Co-authored-by: Mohammad Angkad <mohammad.angkad@radixark.ai>
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2026-09-11 01:04:16 -07:00 |
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Liangsheng Yin
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17fa5ad327
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[Refactor] Generalize attention graph variants in the decode runner (#38993)
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2026-09-11 00:45:58 -07:00 |
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YC Yen-Ching TsengandChen
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f618022b73
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[AMD][CI] Temporarily pause MI355X disaggregated nightly (#39044)
Co-authored-by: Chen <bingxche@amd.com>
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2026-09-11 15:19:24 +08:00 |
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AMD-yanfeiwang
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69aa46b2fa
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[ROCm] Raise HiCache JIT block quota for mapped-host throughput (#39036)
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2026-09-11 00:12:24 -07:00 |
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Shuwen Wang
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a713349faf
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[HiCache] fix: preserve SWA host lock boundaries across splits (#38835)
|
2026-09-11 14:58:26 +08:00 |
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Vignesh Sethuraman
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76ef679cb1
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[AMD] aiter: fail loudly on cross-layer KV sharing in target_verify (#38755)
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2026-09-10 23:37:03 -07:00 |
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Bingxu Chen
|
2465ee3948
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[AMD] Fix DeepSeek block-FP8 loading on gfx94x (#38446)
Signed-off-by: Bingxu Chen <bingxche@amd.com>
|
2026-09-10 23:00:29 -07:00 |
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Alex NailsandHubert Lu
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b9899b04c1
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[AMD] Add gfx1151 (Strix Halo / Ryzen AI MAX+) Docker image (#33939)
Co-authored-by: Hubert Lu <Hubert.Lu@amd.com>
|
2026-09-10 22:46:33 -07:00 |
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Jialin Ouyang
|
6182d45524
|
[Test] Fix Q8KV8 sparse-prefill pool fixture after page-size rename (#39019)
|
2026-09-10 22:22:35 -07:00 |
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Rishabh Sinha
|
2018c64e22
|
[PD] Add is_dummy truth-table wire tests for mooncake and nixl (#34977)
|
2026-09-11 13:14:41 +08:00 |
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Shunkangz
|
40a84d6dfc
|
[kv-shard 1/4] Logical-page placement with UnifiedRadixCache (#38356)
|
2026-09-10 22:06:42 -07:00 |
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Liangsheng Yin
|
94ce940ff8
|
[Bug] Include DSA variant in exact-bucket graph admission (#38992)
|
2026-09-10 21:03:03 -07:00 |
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Yikai Zhang
|
b3dc0388ed
|
test(lora): enable ROCm logprob accuracy coverage (#38791)
|
2026-09-10 20:29:06 -07:00 |
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yuchengliu1andMa Mingfei
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480b14edad
|
[xpu] install xpu-kernel by released wheel (#37394)
Co-authored-by: Ma Mingfei <mingfei.ma@intel.com>
|
2026-09-11 10:47:27 +08:00 |
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ANSHUMAN TRIPATHYandMa Mingfei
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0fadad8933
|
DFLASH support added for XPU (#32798)
Co-authored-by: Ma Mingfei <mingfei.ma@intel.com>
|
2026-09-11 10:39:37 +08:00 |
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Miaomiao Jiang
|
690428b470
|
[XPU] Add xpu forward in Gemma3RMSNorm & Add test and benchmark for Gemma3RMSNorm (#36278)
|
2026-09-11 10:32:25 +08:00 |
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Vignesh Sethuraman
|
7e3ae15f73
|
[AMD] aiter: honor per-layer softmax scale (#38754)
|
2026-09-10 19:27:09 -07:00 |
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ANSHUMAN TRIPATHY
|
3716e496ea
|
Speculative Decoding support for intel_xpu attention backend on XPU target (#30548)
|
2026-09-11 10:25:25 +08:00 |
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ANSHUMAN TRIPATHYandmingfeima
|
2adb2e8485
|
[XPU] Adapt device agnostic API usage (#32093)
Co-authored-by: mingfeima <mingfei.ma@intel.com>
|
2026-09-11 10:03:12 +08:00 |
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|
Siju Samuel
|
67d3a2ea57
|
[XPU] Make checkpoint_engine worker device-agnostic (#32382)
|
2026-09-11 09:56:39 +08:00 |
|
|
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ad7f57c9ea
|
[Responses] Fix empty-prompt routing for token-first chat encoders (kimi_k3, inkling) (#35486)
Co-authored-by: Xinyuan Tong <115166877+JustinTong0323@users.noreply.github.com>
Co-authored-by: Xinyuan Tong <xinyuantong.cs@gmail.com>
|
2026-09-11 01:06:20 +00:00 |
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jasonjk-park
|
9df72e8f5a
|
Fix custom logit processor params when num_tokens_in_batch is used (#38730)
|
2026-09-10 17:52:08 -07:00 |
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Alexandrandronnie_zheng
|
d0035da34e
|
[Diffusion][Refactor] Refactor and unify RoPE execution for DiT models using RotaryEmbedding based on CustomOp (#33555)
Co-authored-by: ronnie_zheng <zl19940307@163.com>
|
2026-09-11 08:31:05 +08:00 |
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Liangsheng Yin
|
41da06adca
|
[Refactor] Generalize DeepSeek V4 compressed pool management (#38954)
|
2026-09-10 17:29:03 -07:00 |
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|
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d006f40e24
|
[AMD][CI] Retire the ROCm 7.0 kernel wheel (#38767)
Co-authored-by: Cursor Agent <cursoragent@cursor.com>
Co-authored-by: quitenode <quitenode@users.noreply.github.com>
|
2026-09-11 08:25:55 +08:00 |
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Alison ShaoandClaude Opus 5
|
00143e9c23
|
Fix dataclasses.asdict on the msgspec ServerArgs (#38958)
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
|
2026-09-10 17:22:54 -07:00 |
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Mohammad Miadh AngkadandMohammad Angkad
|
52c191da52
|
[Deps] Retire the CUDA 12 lane (#38404)
Co-authored-by: Mohammad Angkad <mohammad.angkad@radixark.ai>
|
2026-09-10 16:58:09 -07:00 |
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|
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fae8cd84cb
|
Support NemotronH_Omni_Reasoning_V3 in SGLang (#35599)
Signed-off-by: Ryan Stewart <rystewart@nvidia.com>
Signed-off-by: rystewart-nvidia <rystewart@nvidia.com>
Co-authored-by: elvischenv <219235043+elvischenv@users.noreply.github.com>
Co-authored-by: Po-Han Huang (NVIDIA) <53919306+nvpohanh@users.noreply.github.com>
|
2026-09-10 16:57:22 -07:00 |
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|
cctry
|
203d7e812c
|
Fix KV-canary workspace accounting after graph capture (#38596)
|
2026-09-10 16:10:12 -07:00 |
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|
cctry
|
42bbaac259
|
[metrics] Report logical prefill token counts (#38566)
|
2026-09-10 16:09:21 -07:00 |
|
|
Liangsheng Yin
|
dc5f59c3a2
|
[Refactor] Clarify DeepSeek V4 metadata names for V4.1 (#38947)
|
2026-09-10 15:42:52 -07:00 |
|
|
Pengyun Lin
|
d076eec427
|
[SM120] Use exact query-head widths for DeepSeek-V4 sparse MLA decode (#36655)
|
2026-09-10 15:40:17 -07:00 |
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paulzhang-tmandQiaolin-Yu
|
bb15be6d79
|
[Spec] Stage Inkling MTP draft metadata before verify (#38169)
Co-authored-by: Qiaolin-Yu <liin1211@outlook.com>
|
2026-09-10 15:32:19 -07:00 |
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paulzhang-tm
|
a63efd9056
|
[Spec] Support large MTP batches in short-convolution metadata (#38558)
|
2026-09-10 15:13:17 -07:00 |
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|
|
fd7743e0e1
|
[Sampling] Support sampling masks with overlap scheduling (#36631)
Co-authored-by: ByronHsu <ByronHsu@users.noreply.github.com>
Co-authored-by: root <root@slurm-h200-208-179.slurm-compute.tenant-slurm.svc.cluster.local>
Co-authored-by: Byron Hsu <byron+per@periodiclabs.ai>
|
2026-09-10 14:52:44 -07:00 |
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|
YAMY
|
55b45cb45a
|
fix(qsa): dequantize FP8 cached prefixes in the sparse prefill kernels (#38855)
|
2026-09-10 14:07:39 -07:00 |
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|
|
06dfe05d65
|
[Deps] Raise smg-grpc-servicer floor to >=0.9.0 to unbreak SMG E2E CI (#38801)
Co-authored-by: Kangyan Zhou <kangyan.zhou@radixark.ai>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
|
2026-09-10 13:55:36 -07:00 |
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|
|
a26273d668
|
[AMD] Quantize the bf16 MTP draft experts online to MXFP4 for Qwen3.5 (#38748)
Co-authored-by: Zijie Chen <300606707+zijiecode@users.noreply.github.com>
Co-authored-by: jacky.cheng <yichiche@amd.com>
|
2026-09-10 13:00:41 -07:00 |
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sglang-botandsglang-bot
|
887c401e15
|
docs: sync LMSYS SGLang blog cards (#36773)
Co-authored-by: sglang-bot <sglang-bot@users.noreply.github.com>
|
2026-09-10 18:37:14 +00:00 |
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zijiexiaandClaude Opus 5
|
4b7331fb77
|
Make the remaining DeepSeek-V4.1 NVIDIA cells start (#38861)
Co-authored-by: Claude Opus 5 <noreply@anthropic.com>
|
2026-09-10 11:04:53 -07:00 |
|
|
James
|
209654c420
|
[NPU][Hicache] Optimize HiCache L2 IO with Memfabric acc_offload (#38826)
|
2026-09-11 00:23:36 +08:00 |
|