 Shuwen Wang
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a72d8d29d3
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Fix HiCache PP sync test fixture (#35446)
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2026-08-19 12:25:17 +08:00 |
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Jimmy ShongandClaude Fable 5
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c863760ae1
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[Fix] DCP: advertise the logical KV-event block size (#35298)
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
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2026-08-18 20:55:11 -07:00 |
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Muqi LiandCodex
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88f6074392
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feat(api): add sglext_spec (#33518)
Signed-off-by: Muqi Li <muqi1029@gmail.com>
Co-authored-by: Codex <noreply@openai.com>
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2026-08-19 11:54:18 +08:00 |
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luoroger37
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3b065a56b0
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[HiCache] Batch PP write and load completion sync (#33473)
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2026-08-19 11:27:27 +08:00 |
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Mohammad Miadh AngkadandMohammad Angkad
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1beb805356
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[Perf] Restore the 16-token router GEMM threshold on SM10X (#34953)
Co-authored-by: Mohammad Angkad <mohammad.angkad@radixark.ai>
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2026-08-18 19:53:52 -07:00 |
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HuangJi
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ee1f2e8dfd
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[diffusion][Minimax H3]support subblock sparse attention on SM90 (#34680)
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2026-08-19 10:31:45 +08:00 |
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DayuxiaoshuiandMick
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eb085524c8
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[diffusion] fix: make MiniMax-H3 AdaLN cache rebuild transactional (#34993)
Co-authored-by: Mick <mickjagger19@icloud.com>
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2026-08-19 10:27:38 +08:00 |
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Zhiqiang Xie
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977412ae61
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[HiCache] Buffer-only mode for HiCache host memory layer (#34798)
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2026-08-18 19:21:24 -07:00 |
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Mick
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4cef72faee
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[diffusion] refactor: reuse srt qwen vision and text modules (#35006)
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2026-08-19 10:12:44 +08:00 |
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Chunyuan WU
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58c5bee3ac
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Fix DP attention on CPU (#12961)
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2026-08-19 09:56:21 +08:00 |
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akhilg-nvandYangmin Li
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5d12280ae7
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Add fmha_v2 attention backend for SM90/120 (#23112)
Co-authored-by: Yangmin Li <yangminl@nvidia.com>
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2026-08-18 18:41:03 -07:00 |
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Mick
|
baa2251847
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[diffusion] chore: make --vae-tiling honest, fix the decode oom advice, gate nvfp4 on blackwell (#35353)
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2026-08-19 09:27:54 +08:00 |
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Mick
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ef490853bb
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quant: extract shared checkpoint quant metadata resolver (#35172)
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2026-08-19 08:26:41 +08:00 |
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MickandClaude Fable 5
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e73201e462
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[diffusion] feat: support cache-dit, cfg gating, attention backend override as per-request param (#35339)
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
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2026-08-19 08:24:03 +08:00 |
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MickandClaude Opus 5
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77fc5c128e
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[perf] overlap page preprocessing, pack the vit, enable prefill CUDA graph for paddle-ocr (#35318)
Co-authored-by: Claude Opus 5 <noreply@anthropic.com>
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2026-08-19 08:20:55 +08:00 |
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64e404263e
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[Doc] Fix TP and attention-TP group layout in initialize_model_parallel docstring (#34862)
Co-authored-by: NanoByte0513 <167996578+NanoByte0513@users.noreply.github.com>
Co-authored-by: Xiaoyu Zhang <1182563586@qq.com>
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2026-08-19 08:15:03 +08:00 |
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c14312a664
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[Spec] DFlash2: local convolution + candidate selector (#35371)
Co-authored-by: Jian Chen <jianchen0311@gmail.com>
Co-authored-by: Liangsheng Yin <hnyls2002@gmail.com>
Co-authored-by: hnyls2002 <lsyincs@gmail.com>
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2026-08-18 17:07:28 -07:00 |
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Augusto Yao
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3a8f522f65
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install sglang in virtual env instead of system path (#30612)
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2026-08-18 16:36:50 -07:00 |
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Baizhou Zhang
|
cfc6dfb364
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Apply latest DeepEP branch (#34923)
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2026-08-18 16:24:50 -07:00 |
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cctryandcctry
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37c09ff3d8
|
[Memory] Borrow CUDA graph pool storage for EAGLE sampling (#35375)
Co-authored-by: cctry <cctry@fb.com>
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2026-08-18 16:19:41 -07:00 |
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Liangsheng Yin
|
7ebaa98f81
|
[Fix] Assert the page-aligned SWA evict floor on both PD decode prealloc paths (#35396)
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2026-08-18 15:48:55 -07:00 |
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Baizhou Zhang
|
b814a7e812
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[CI] Skip fast-fail for scheduled stages (#35392)
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2026-08-18 15:07:33 -07:00 |
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Liangsheng Yin
|
87a09494fa
|
[Refactor] Share the page-aligned decode alloc lens between EAGLE and DFLASH (#35382)
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2026-08-18 14:39:41 -07:00 |
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Joe Rowell
|
7b5410c999
|
Laguna: config-driven MoE router scoring (#35362)
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2026-08-18 13:42:36 -07:00 |
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Liangsheng Yin
|
79dfef390b
|
[Spec] Page-align the DFLASH decode KV reservation (#35265)
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2026-08-18 13:36:04 -07:00 |
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Liangsheng Yin
|
aa82229173
|
[Fix] Assert the page-aligned SWA evict floor at PD decode prealloc (#35286)
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2026-08-18 13:32:16 -07:00 |
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Yuwei AnandClaude Opus 5
|
955704544c
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[Fix] Skip padded state slots in the chunked GDN kernel (#33431)
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
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2026-08-18 13:07:19 -07:00 |
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307a90f6d3
|
Stop losing Kimi-K3 tool calls to reasoning, constraint conflicts, and truncation (#34881)
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
Co-authored-by: Xinyuan Tong <xinyuantong.cs@gmail.com>
Co-authored-by: Xinyuan Tong <115166877+JustinTong0323@users.noreply.github.com>
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2026-08-18 12:42:56 -07:00 |
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Wei YangandWei Yang
|
8bb106cee9
|
Fix NIXL cleaner grouping for hybrid cache keys (#35130)
Co-authored-by: Wei Yang <yawei@microsoft.com>
|
2026-08-18 13:55:51 -05:00 |
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|
Hanming Lu
|
526af15845
|
[Metrics] Discount queued prefill load by recent cache hits when waiting-queue matching is off (#35248)
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2026-08-18 11:27:21 -07:00 |
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Xingyu Liuandxingyuliu
|
7dcaf11987
|
[Fix] Select custom all-reduce v2 by topology capability (#35061)
Co-authored-by: xingyuliu <xingyuliu@fb.com>
|
2026-08-18 10:30:10 -07:00 |
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Ke Bao
|
480033def0
|
Refactor kv cache event mixin into a recorder (#35164)
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2026-08-19 01:20:17 +08:00 |
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jain-ria
|
83d7d45330
|
fix: preserve output logprobs without input logprobs (#34627)
Signed-off-by: jain-ria <riajain@NVIDIA.com>
|
2026-08-18 12:07:13 -05:00 |
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MickandClaude Opus 5
|
3f26febaff
|
[diffusion] fix: decouple encoder parallelism from the dit parallel layout (#34713)
Co-authored-by: Claude Opus 5 <noreply@anthropic.com>
|
2026-08-19 00:16:09 +08:00 |
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|
LinyuanLi
|
9485c083bb
|
[NPU] Add mxfp4-w4a4 MOE Quantization Support for NPU (#30319)
|
2026-08-18 19:06:05 +03:00 |
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|
Shangming CaiandClaude Opus 4.8
|
97dedd1ce9
|
[PD] Deferred decode-side KV release for aborts mid-transfer (#35049)
Co-authored-by: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
|
2026-08-18 23:56:33 +08:00 |
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|
hhhh1252023
|
c60952d933
|
Exclude multimodal-gen NPU jobs from fast-fail cascade (#35238)
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2026-08-18 23:48:48 +08:00 |
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|
pllimax
|
499e90a125
|
[NPU CI] Reorganize test output/log directory structure with workflow context (#33685)
|
2026-08-18 23:46:00 +08:00 |
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|
WenhaoZhang
|
63d783bbe0
|
[diffusion] optimization: INT8 Linear + pluggable DiT attention backends for MiniMax-H3 on consumer-level GPUs (#34581)
|
2026-08-18 21:44:39 +08:00 |
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paulzhang-tm
|
0065fbfae1
|
[Scheduler] Cap prefill-delayer queue target by admission capacity (#35191)
|
2026-08-18 21:40:13 +08:00 |
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|
Andy Ye
|
94eef833fe
|
[diffusion] rl: support cosmos3 (#34197)
|
2026-08-18 20:42:27 +08:00 |
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|
Xiaoyu ZhangandClaude Opus 5
|
ae6945e112
|
[kernels] Reorganize ops/diffusion by operator domain behind a lazy facade (#35114)
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
|
2026-08-18 20:37:43 +08:00 |
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|
HeYaoandHeYao
|
7605529bdf
|
Add deepseek_v4_flash_w8a8_8p_in32k_out1k_50ms (#35162)
Co-authored-by: HeYao <heyao@example.com>
|
2026-08-18 19:41:25 +08:00 |
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|
YC Yen-Ching Tseng
|
f7101b0ae6
|
[AMD] MiniMax-M3 : Fuse QKV+index proj for block-fp8 (#32099)
|
2026-08-18 03:01:01 -07:00 |
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|
karverma-amd
|
24d625698d
|
[AMD] feat(moe): fold padded-topk_ids fill into fused shared-experts append+remap (#31370)
|
2026-08-18 02:32:57 -07:00 |
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|
Lianmin Zheng
|
70ee6b1714
|
[Rust Server] Add e2e latency metadata and fix Sarashina import (#35125)
|
2026-08-18 02:08:07 -07:00 |
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vijay-kodamalla
|
880ab72f34
|
test: extend NVFP4 Marlin tests to SM120 (#34327)
|
2026-08-18 16:24:00 +08:00 |
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|
mohbasit
|
fc0b95e7ba
|
Profiling Enhancements [2/3]: detailed execution step annotations (#24911)
|
2026-08-18 01:09:07 -07:00 |
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Emil BogomolovandEmil Bogomolov
|
667389c50f
|
[diffusion] chore: filter transformer safetensors by index.json to drop duplicate shard variants (#35107)
Co-authored-by: Emil Bogomolov <zetyquickly@googlemail.com>
|
2026-08-18 16:05:05 +08:00 |
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|
Liangsheng Yin
|
0111b29031
|
[Perf] Hoist DSv4 draft-extend SWA write locs; unify SWA graph buffer naming (#34890)
|
2026-08-18 00:13:28 -07:00 |
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