 Siyuan ChenandYuwei An
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c9a8fba991
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[DSV4][BCG] Optimize the heavy memory use of C4 Indexer when BCG is enabled (#36534)
Co-authored-by: Yuwei An <ayw.sirius19@gmail.com>
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2026-09-15 17:23:11 -07:00 |
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Siyuan ChenandBJWang-ant
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832ec39cc0
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[Intra-node PD][DSV4] Pack all layers into one batch for INTRA_NODE_NVLINK path (#38984)
Co-authored-by: BJWang-ant <wangbingjia.wbj@ant-intl.com>
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2026-09-15 21:08:33 +08:00 |
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Siyuan Chen
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38b74d294b
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Add docs for TP LMHead optimizaiton (#35283)
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2026-08-19 14:59:35 -07:00 |
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Siyuan Chen
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fcdaaf8a5d
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[Feature] Optimize TP LMHead with All-to-All (#32313)
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2026-08-17 19:55:27 -07:00 |
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Siyuan Chen
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71fe41b6b3
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[DSV4] Support megamoe for CP (#29569)
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2026-07-23 14:46:32 -07:00 |
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111009ea54
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[Feature] [Ngram spec] Support ngram spec v2 (#17260)
Co-authored-by: hnyls2002 <lsyincs@gmail.com>
Co-authored-by: Ratish P <114130421+Ratish1@users.noreply.github.com>
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2026-06-10 02:46:00 -07:00 |
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Siyuan Chenandxutizhou
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7f45bcdd2a
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[dsv4] support eplb (#25948)
Co-authored-by: xutizhou <xutingz@nvidia.com>
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2026-05-24 10:09:41 -07:00 |
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Siyuan Chen
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578b119bc6
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[BugFix] Fix server crashes when req.grammar and ngram spec are enabled (#17585)
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2026-01-30 11:57:42 -08:00 |
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Siyuan ChenandXinyuan Tong
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9a414b164c
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[Performance] Optimze the performance of Qwen25VL (#15640)
Co-authored-by: Xinyuan Tong <115166877+JustinTong0323@users.noreply.github.com>
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2026-01-02 23:15:36 -08:00 |
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Siyuan Chen
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0e54a69548
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[bugfix] qwen25-VL support lora (#14638)
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2025-12-10 11:38:51 -08:00 |
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Siyuan Chen
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a164259efd
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[Router bugfix] Fix router_manager selecting the wrong router when enable-igw. (#13572)
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2025-11-24 18:51:41 -08:00 |
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4ef4390540
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bugfix: multi-model routing for /generate api (#12979)
Co-authored-by: Simo Lin <linsimo.mark@gmail.com>
Co-authored-by: Chang Su <chang.s.su@oracle.com>
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2025-11-12 11:13:27 -08:00 |
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