Commit Graph
16839 Commits
Author SHA1 Message Date
8a1e6e4e46 Qwen3.8-27B Model Support (#34859)
Co-authored-by: Jimmy Shong <69131491+Jiminator@users.noreply.github.com>
Co-authored-by: Brayden Zhong <brayden.zhong@radixark.ai>
Co-authored-by: BBuf <1182563586@qq.com>
Co-authored-by: Zijie Xia <zijie.xia@radixark.ai>
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
Co-authored-by: Qiaolin Yu <liin1211@outlook.com>
2026-08-19 16:31:43 +08:00
kangwangamdandbingxche ebec85f606 [AMD][DI][CI] Run MI355X disagg nightly at 7AM UTC (#35467)
Co-authored-by: bingxche <bingxche@users.noreply.github.com>
2026-08-19 16:27:20 +08:00
MickandYiqi Yang 73e5fa4724 [diffusion] refactor: gate native encoder quantized checkpoints (#35183)
Co-authored-by: Yiqi Yang <yangyiqi8787@gmail.com>
2026-08-19 16:18:36 +08:00
Liangsheng Yin ccbe380028 [CI] Trim the base-c 4-gpu-h100 stage from 5 shards to 4 (#35407) 2026-08-19 00:48:07 -07:00
Liangsheng Yin e614121866 [Fix] Scale the req_to_token row headroom by attn_dcp_size (#35424) 2026-08-19 00:37:26 -07:00
f4158719d1 [AMD] Let the diffusion AITer backend take grouped-query K/V (fix Cosmos3-Nano startup) (#34485)
Co-authored-by: Cursor Agent <cursoragent@cursor.com>
Co-authored-by: Michael <michaelzhang-ai@users.noreply.github.com>
2026-08-19 00:17:40 -07:00
MickandClaude Opus 5 c0c87e0547 VLM: feed the packed qkv projection output to vision backends uncopied (#35336)
Co-authored-by: Claude Opus 5 <noreply@anthropic.com>
2026-08-19 14:39:52 +08:00
Mick a5c96362b6 [diffusion] chore: reuse shared checkpoint quant metadata resolver (#35174) 2026-08-19 13:36:55 +08:00
Mick 593b1a9b8a [diffusion] optimization: reduce minimax h3 mps memory pressure (#33880) 2026-08-19 13:35:01 +08:00
Alison ShaoandXinyuan Tong 3391ab3712 [Constrained] Support MistralCommon tokenizers in the XGrammar backend (#35215)
Co-authored-by: Xinyuan Tong <xinyuantong.cs@gmail.com>
2026-08-19 12:34:48 +08:00
Shuwen Wang a72d8d29d3 Fix HiCache PP sync test fixture (#35446) 2026-08-19 12:25:17 +08:00
Jimmy ShongandClaude Fable 5 c863760ae1 [Fix] DCP: advertise the logical KV-event block size (#35298)
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
2026-08-18 20:55:11 -07:00
Muqi LiandCodex 88f6074392 feat(api): add sglext_spec (#33518)
Signed-off-by: Muqi Li <muqi1029@gmail.com>
Co-authored-by: Codex <noreply@openai.com>
2026-08-19 11:54:18 +08:00
luoroger37 3b065a56b0 [HiCache] Batch PP write and load completion sync (#33473) 2026-08-19 11:27:27 +08:00
Mohammad Miadh AngkadandMohammad Angkad 1beb805356 [Perf] Restore the 16-token router GEMM threshold on SM10X (#34953)
Co-authored-by: Mohammad Angkad <mohammad.angkad@radixark.ai>
2026-08-18 19:53:52 -07:00
HuangJi ee1f2e8dfd [diffusion][Minimax H3]support subblock sparse attention on SM90 (#34680) 2026-08-19 10:31:45 +08:00
DayuxiaoshuiandMick eb085524c8 [diffusion] fix: make MiniMax-H3 AdaLN cache rebuild transactional (#34993)
Co-authored-by: Mick <mickjagger19@icloud.com>
2026-08-19 10:27:38 +08:00
Zhiqiang Xie 977412ae61 [HiCache] Buffer-only mode for HiCache host memory layer (#34798) 2026-08-18 19:21:24 -07:00
Mick 4cef72faee [diffusion] refactor: reuse srt qwen vision and text modules (#35006) 2026-08-19 10:12:44 +08:00
Chunyuan WU 58c5bee3ac Fix DP attention on CPU (#12961) 2026-08-19 09:56:21 +08:00
akhilg-nvandYangmin Li 5d12280ae7 Add fmha_v2 attention backend for SM90/120 (#23112)
Co-authored-by: Yangmin Li <yangminl@nvidia.com>
2026-08-18 18:41:03 -07:00
Mick baa2251847 [diffusion] chore: make --vae-tiling honest, fix the decode oom advice, gate nvfp4 on blackwell (#35353) 2026-08-19 09:27:54 +08:00
Mick ef490853bb quant: extract shared checkpoint quant metadata resolver (#35172) 2026-08-19 08:26:41 +08:00
MickandClaude Fable 5 e73201e462 [diffusion] feat: support cache-dit, cfg gating, attention backend override as per-request param (#35339)
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
2026-08-19 08:24:03 +08:00
MickandClaude Opus 5 77fc5c128e [perf] overlap page preprocessing, pack the vit, enable prefill CUDA graph for paddle-ocr (#35318)
Co-authored-by: Claude Opus 5 <noreply@anthropic.com>
2026-08-19 08:20:55 +08:00
64e404263e [Doc] Fix TP and attention-TP group layout in initialize_model_parallel docstring (#34862)
Co-authored-by: NanoByte0513 <167996578+NanoByte0513@users.noreply.github.com>
Co-authored-by: Xiaoyu Zhang <1182563586@qq.com>
2026-08-19 08:15:03 +08:00
c14312a664 [Spec] DFlash2: local convolution + candidate selector (#35371)
Co-authored-by: Jian Chen <jianchen0311@gmail.com>
Co-authored-by: Liangsheng Yin <hnyls2002@gmail.com>
Co-authored-by: hnyls2002 <lsyincs@gmail.com>
2026-08-18 17:07:28 -07:00
Augusto Yao 3a8f522f65 install sglang in virtual env instead of system path (#30612) 2026-08-18 16:36:50 -07:00
Baizhou Zhang cfc6dfb364 Apply latest DeepEP branch (#34923) 2026-08-18 16:24:50 -07:00
cctryandcctry 37c09ff3d8 [Memory] Borrow CUDA graph pool storage for EAGLE sampling (#35375)
Co-authored-by: cctry <cctry@fb.com>
2026-08-18 16:19:41 -07:00
Liangsheng Yin 7ebaa98f81 [Fix] Assert the page-aligned SWA evict floor on both PD decode prealloc paths (#35396) 2026-08-18 15:48:55 -07:00
Baizhou Zhang b814a7e812 [CI] Skip fast-fail for scheduled stages (#35392) 2026-08-18 15:07:33 -07:00
Liangsheng Yin 87a09494fa [Refactor] Share the page-aligned decode alloc lens between EAGLE and DFLASH (#35382) 2026-08-18 14:39:41 -07:00
Joe Rowell 7b5410c999 Laguna: config-driven MoE router scoring (#35362) 2026-08-18 13:42:36 -07:00
Liangsheng Yin 79dfef390b [Spec] Page-align the DFLASH decode KV reservation (#35265) 2026-08-18 13:36:04 -07:00
Liangsheng Yin aa82229173 [Fix] Assert the page-aligned SWA evict floor at PD decode prealloc (#35286) 2026-08-18 13:32:16 -07:00
Yuwei AnandClaude Opus 5 955704544c [Fix] Skip padded state slots in the chunked GDN kernel (#33431)
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
2026-08-18 13:07:19 -07:00
307a90f6d3 Stop losing Kimi-K3 tool calls to reasoning, constraint conflicts, and truncation (#34881)
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
Co-authored-by: Xinyuan Tong <xinyuantong.cs@gmail.com>
Co-authored-by: Xinyuan Tong <115166877+JustinTong0323@users.noreply.github.com>
2026-08-18 12:42:56 -07:00
Wei YangandWei Yang 8bb106cee9 Fix NIXL cleaner grouping for hybrid cache keys (#35130)
Co-authored-by: Wei Yang <yawei@microsoft.com>
2026-08-18 13:55:51 -05:00
Hanming Lu 526af15845 [Metrics] Discount queued prefill load by recent cache hits when waiting-queue matching is off (#35248) 2026-08-18 11:27:21 -07:00
Xingyu Liuandxingyuliu 7dcaf11987 [Fix] Select custom all-reduce v2 by topology capability (#35061)
Co-authored-by: xingyuliu <xingyuliu@fb.com>
2026-08-18 10:30:10 -07:00
Ke Bao 480033def0 Refactor kv cache event mixin into a recorder (#35164) 2026-08-19 01:20:17 +08:00
jain-ria 83d7d45330 fix: preserve output logprobs without input logprobs (#34627)
Signed-off-by: jain-ria <riajain@NVIDIA.com>
2026-08-18 12:07:13 -05:00
MickandClaude Opus 5 3f26febaff [diffusion] fix: decouple encoder parallelism from the dit parallel layout (#34713)
Co-authored-by: Claude Opus 5 <noreply@anthropic.com>
2026-08-19 00:16:09 +08:00
LinyuanLi 9485c083bb [NPU] Add mxfp4-w4a4 MOE Quantization Support for NPU (#30319) 2026-08-18 19:06:05 +03:00
Shangming CaiandClaude Opus 4.8 97dedd1ce9 [PD] Deferred decode-side KV release for aborts mid-transfer (#35049)
Co-authored-by: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
2026-08-18 23:56:33 +08:00
hhhh1252023 c60952d933 Exclude multimodal-gen NPU jobs from fast-fail cascade (#35238) 2026-08-18 23:48:48 +08:00
pllimax 499e90a125 [NPU CI] Reorganize test output/log directory structure with workflow context (#33685) 2026-08-18 23:46:00 +08:00
WenhaoZhang 63d783bbe0 [diffusion] optimization: INT8 Linear + pluggable DiT attention backends for MiniMax-H3 on consumer-level GPUs (#34581) 2026-08-18 21:44:39 +08:00
paulzhang-tm 0065fbfae1 [Scheduler] Cap prefill-delayer queue target by admission capacity (#35191) 2026-08-18 21:40:13 +08:00