 sglang-botandsglang-bot
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887c401e15
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docs: sync LMSYS SGLang blog cards (#36773)
Co-authored-by: sglang-bot <sglang-bot@users.noreply.github.com>
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2026-09-10 18:37:14 +00:00 |
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zijiexiaandClaude Opus 5
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4b7331fb77
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Make the remaining DeepSeek-V4.1 NVIDIA cells start (#38861)
Co-authored-by: Claude Opus 5 <noreply@anthropic.com>
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2026-09-10 11:04:53 -07:00 |
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James
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209654c420
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[NPU][Hicache] Optimize HiCache L2 IO with Memfabric acc_offload (#38826)
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2026-09-11 00:23:36 +08:00 |
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Shuwen Wang
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19b83b4b9d
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[Radix Cache] Fix PureSWA tail release without insertion (#38349)
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2026-09-10 23:55:48 +08:00 |
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Shuwen Wang
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cc7e43ad22
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[HiCache] Account for newly pinned ancestors in load-back quota (#38481)
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2026-09-10 23:54:08 +08:00 |
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pllimax
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92dffebe16
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[NPU] Set DEEPEP_HYBRID_DEPLOYMENT for new DeepEP tests; switch glm5_2 to w8a8; tune nightly timeouts (#38775)
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2026-09-10 23:32:54 +08:00 |
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Chengze Fan
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12771786f2
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[AMD] Restore AITER verify runtime sizing reverted by #34647 (#38575)
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2026-09-10 05:57:47 -07:00 |
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Mohammad Miadh AngkadandMohammad Angkad
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613002281e
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[CI] Drop the GPTQ dynamic-config test for the deleted non-Marlin kernel (#38881)
Co-authored-by: Mohammad Angkad <mohammad.angkad@radixark.ai>
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2026-09-10 20:55:06 +08:00 |
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Jialin Ouyang
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908226fea2
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[Rust TreeCore] Support external cache linker (#37306)
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2026-09-10 19:22:24 +08:00 |
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liupeng374
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334e94d8ac
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[NPU] fix pp 2 hang on npu (#38249)
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2026-09-10 19:21:37 +08:00 |
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Yuhao YangandClaude Code
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a37ded1693
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[Cookbook] DeepSeek-V4.1: add the HiCache L2 knob to the Playground (#38844)
Co-authored-by: Claude Code <noreply@anthropic.com>
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2026-09-10 18:20:34 +08:00 |
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Mohammad Miadh AngkadandMohammad Angkad
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dc2157dcd6
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[JIT] Port the expert-pack MXFP4 kernels to load_jit and fix their launch limits (#38830)
Co-authored-by: Mohammad Angkad <mohammad.angkad@radixark.ai>
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2026-09-10 17:50:51 +08:00 |
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Mohammad Miadh Angkad
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8022505705
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Revert "[CI] Temporarily disable GB300 tests" (#38842)
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2026-09-10 02:41:15 -07:00 |
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MickandMick Qian
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c9c26d56b2
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[diffusion] docs: sync snapshot and minimax-h3 subblock features (#38784)
Co-authored-by: Mick Qian <mickqian@users.noreply.github.com>
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2026-09-10 17:23:43 +08:00 |
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8a6ab89bf0
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[AMD] Enable Fast Triton Sparse MLA backend (#30575)
Co-authored-by: clintg6 <7388379+clintg6@users.noreply.github.com>
Co-authored-by: HAI <hixiao@gmail.com>
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2026-09-10 01:58:00 -07:00 |
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zijiexiaandClaude Opus 5
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5caafd2118
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Fix the DeepSeek-V4.1 reasoning example and mark the B300 cells verified (#38839)
Co-authored-by: Claude Opus 5 <noreply@anthropic.com>
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2026-09-10 01:49:44 -07:00 |
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Baizhou Zhang
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fa6e657b93
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[misc] Update CI permission (#38834)
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2026-09-10 01:38:58 -07:00 |
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ashwini rathi
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b23db06769
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pyproject(xpu): drop human-eval git dep to unblock image build (#38824)
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2026-09-10 16:24:43 +08:00 |
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55b4f4f195
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[Test] Add offline Transformers loader compatibility checks (#38336)
Signed-off-by: adarshxs <adarsh.shirawalmath@gmail.com>
Co-authored-by: Xinyuan Tong <115166877+JustinTong0323@users.noreply.github.com>
Co-authored-by: Alex Nails <alex.nails@radixark.ai>
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2026-09-10 01:07:43 -07:00 |
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Xinyuan Tong
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9a2f17f41d
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Add INT4 and FP4 lanes to the Ling-3.0-flash-VL cookbook (#38527)
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2026-09-10 15:23:50 +08:00 |
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1b77f498a0
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[NVIDIA] Support flashinfer Mega Moe (#31470)
Co-authored-by: djns99 <40156487+djns99@users.noreply.github.com>
Co-authored-by: 云挚 <ningyunxiao.nyx@antgroup.com>
Co-authored-by: Yangmin Li <yangminl@nvidia.com>
Co-authored-by: Po-Han Huang (NVIDIA) <53919306+nvpohanh@users.noreply.github.com>
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2026-09-10 00:22:47 -07:00 |
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Brayden ZhongandBrayden Zhong
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c0b790cf7f
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Delete cutlass_mla, non-Marlin GPTQ, AWQ AOT kernel, and Dual Chunk Flash Attention (#32114)
Co-authored-by: Brayden Zhong <brayden@radixark.ai>
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2026-09-10 15:12:01 +08:00 |
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Brayden ZhongandBrayden Zhong
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7152c14384
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Fix DeepSeek-V4 routing: sqrtsoftplus underflow and unfloored renorm (#34459)
Co-authored-by: Brayden Zhong <brayden@radixark.ai>
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2026-09-10 15:10:50 +08:00 |
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YC Yen-Ching Tseng
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6b2e13bcb0
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[AMD] Fix the diffusion perf fixture lookup (#38686)
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2026-09-10 00:07:08 -07:00 |
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Bingxu Chen
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bd922bc39b
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[AMD][CI] Fix UMBP test buffer after MoRI upgrade (#38672)
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2026-09-10 00:02:00 -07:00 |
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13fb796c81
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[AMD][CI] Drop the dead miles ROCm 7.0 nightly image build (#38694)
Co-authored-by: Cursor Agent <cursoragent@cursor.com>
Co-authored-by: Michael <michaelzhang-ai@users.noreply.github.com>
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2026-09-10 00:00:28 -07:00 |
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Michael
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026e61bd94
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[AMD] Restore AMD CI registrations dropped by #37436 (#38581)
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2026-09-09 23:59:10 -07:00 |
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Michael
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f3152439d0
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[AMD][CI] Publish ROCm 10 release images and kernel wheel (#38763)
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2026-09-09 23:57:00 -07:00 |
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ashwini rathi
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a1ec35a330
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docker(xpu): install libssl-dev so JIT hicache_hash_cpp builds (#38796)
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2026-09-10 14:37:20 +08:00 |
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Shuwen Wang
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058cca0192
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[HiCache] Fix side pools to use resolved host allocator (#38350)
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2026-09-10 14:28:20 +08:00 |
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zijiexiaandClaude Opus 5
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69777c4d36
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Add DeepSeek-V4.1 Flash cookbook (#38802)
Co-authored-by: Claude Opus 5 <noreply@anthropic.com>
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2026-09-09 23:15:30 -07:00 |
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DAI0818andPo-Han Huang
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03e4c06589
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Fix Qwen3.5 GDN multi-item scoring (#33922)
Co-authored-by: Po-Han Huang (NVIDIA) <53919306+nvpohanh@users.noreply.github.com>
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2026-09-09 22:30:39 -07:00 |
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Kan WuandClaude Fable 5
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6f481ad0e3
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[router] Raise chat body cap to 32 MB for multimodal payloads (#38735)
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
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2026-09-09 22:14:49 -07:00 |
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Sage
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01ad27ecd9
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[CPU] Fix native KV hash compilation in Xeon image (#34767)
Signed-off-by: Sage Ahrac <sagiahrak@gmail.com>
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2026-09-10 12:51:25 +08:00 |
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ashwini rathiandarathi-hlab
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6ab6df54b9
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Add missing test dependencies to pyproject.toml variants (#36098)
Co-authored-by: arathi-hlab <arathi.rajendran@intel.com>
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2026-09-10 12:49:16 +08:00 |
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Thomas Wang
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c415f977b8
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[AMD] Update v4 args for agentic workload (#38677)
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2026-09-09 21:41:05 -07:00 |
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Alison Shao
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2f7393f0d2
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[Simulator] Give the OFFLINE/BLOCKING comparison tolerances real headroom (#38732)
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2026-09-10 11:10:38 +08:00 |
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Cheng Wan
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f1a512c51c
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[Config] msgspec.Struct for the config tier (#38753)
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2026-09-09 19:41:19 -07:00 |
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Xinyu JiangandZhiyao Jiang
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106cc561f9
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[AMD] ci: move the miles nightlies from rocm700 to rocm10 (#37495)
Co-authored-by: Zhiyao Jiang <jessicajiang324@gmail.com>
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2026-09-10 10:37:34 +08:00 |
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Cheng Wan
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53dc77ff4e
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[Config] One writer for the declaration stash; no exception to the write seal (#38752)
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2026-09-09 19:22:06 -07:00 |
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ashwini rathiandarathi-hlab
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9a1b1d2d5e
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docker(xpu): drop redundant setvars.sh from torch_memory_saver RUN (#38665)
Co-authored-by: arathi-hlab <arathi-hlab@users.noreply.github.com>
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2026-09-10 10:14:50 +08:00 |
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fd596a474c
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[XPU][Fix] Pack device-pointer tables as uint64 to avoid 64-bit address overflow (#35051)
Co-authored-by: roopaksrivastav <roopak.srivastava@intel.com>
Co-authored-by: Claude Opus 5 <noreply@anthropic.com>
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2026-09-10 10:12:18 +08:00 |
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Alison Shao
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3700c4ee26
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[CI] Temporarily disable GB300 tests (#38770)
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2026-09-09 18:31:00 -07:00 |
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Mick
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7f0285093e
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[diffusion] feat: spill large tensors over shared memory like numpy arrays (#38656)
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2026-09-10 09:14:06 +08:00 |
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MickandMick Qian
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ce555ed82a
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[diffusion] refactor: refactor utility ownership and document helper placement (#38699)
Co-authored-by: Mick Qian <mickqian@users.noreply.github.com>
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2026-09-10 09:11:01 +08:00 |
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LinyuanLi
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3ff226ba8f
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[NPU]Support GLM5.2 and FP8 DSA&Indexer kvcache for 950 (#38250)
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2026-09-10 09:10:10 +08:00 |
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Alison Shao
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a7e00b7576
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[CI] Answer unrecognized slash commands instead of skipping silently (#38736)
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2026-09-09 18:01:18 -07:00 |
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92d831d3d7
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[AMD] Parallelize aiter spec-decode KV index building over token blocks (#37659)
Co-authored-by: Zijie Chen <300606707+zijiecode@users.noreply.github.com>
Co-authored-by: jacky.cheng <yichiche@amd.com>
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2026-09-09 17:53:53 -07:00 |
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880d6fa64d
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[DSv4] Integrate TRT-LLM DSv4 Attention for SM100/103 (#30805)
Co-authored-by: Yangmin Li <yangminl@nvidia.com>
Co-authored-by: Po-Han Huang (NVIDIA) <53919306+nvpohanh@users.noreply.github.com>
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2026-09-09 17:40:07 -07:00 |
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William Hu
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0084030179
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Add Opt-In for GLM-5.3 Flash breakable prefill CUDA graphs (#38522)
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2026-09-09 17:02:08 -07:00 |
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