 weireweire
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f9a3720e2b
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Skip empty non-idle output batches (#28504)
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2026-06-26 02:40:01 +08:00 |
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weireweireandweireweire
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5f30fa258c
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Support DP-aware PD router dispatch (#26245)
Co-authored-by: weireweire <20922698+weireweire@users.noreply.github.com>
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2026-06-24 15:02:51 -07:00 |
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weireweireandweireweire
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7fd63f4cf2
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Remove stale load collection from output streaming hot path (#28408)
Co-authored-by: weireweire <20922698+weireweire@users.noreply.github.com>
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2026-06-17 15:02:20 -07:00 |
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weireweire
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bf38a0b03d
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Fix disaggregated decode load token accounting (#25736)
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2026-06-15 11:37:41 +08:00 |
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weireweireandZhangheng
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034dd39189
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Support KV events for UnifiedRadixCache (#26387)
Co-authored-by: Zhangheng <hzh0425@apache.org>
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2026-05-27 22:10:40 +08:00 |
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weireweire
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629b6c6a85
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correct allreduce fusion and dummy_run alignment in SCATTERED MLP mode (moe_dense_tp_size=1) (#19918)
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2026-05-22 19:18:25 -07:00 |
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weireweire
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684638e053
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Fix prefill batch iter logging under overlap (#20845)
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2026-05-07 02:10:42 -07:00 |
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weireweire
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9191b02eda
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Fix cuda graph max bs capture upper bound (#21005)
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2026-03-31 15:20:56 -07:00 |
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weireweireandWeiliangl User
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4455d17619
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[PD] Refactor Disagg Conn and Fix Hang with total_request/total_tokens Balancing (#21299)
Co-authored-by: Weiliangl User <weiliangl@login-node.hosted.internal>
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2026-03-31 18:01:50 +08:00 |
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weiliang
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6559e43f30
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Support FP8 MLA prefill and 128k context. (#14395)
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2025-12-19 01:24:00 -08:00 |
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weiliang
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a18161875c
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Fix Flashinfer Backend for SM120 Usage (#12325)
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2025-10-29 11:51:55 -07:00 |
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weiliang
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88596739a4
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Support running FP4 Deepseek on SM120. (#11708)
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2025-10-27 17:37:49 -07:00 |
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