 shuwennandmaodoudou168
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68706e615a
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[SPEC] fix: use effective max draft tokens for adaptive spec initiali… (#26354)
Co-authored-by: maodoudou168 <maodoudou168@users.noreply.github.com>
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2026-05-28 13:33:11 -07:00 |
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Cameron Quilici
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3ca8cb470f
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[BugFix] preserve cached token details in multi-tokenizer output (#26590)
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2026-05-28 13:31:55 -07:00 |
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Mohammad Miadh Angkad
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690d4cdd94
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Revert "[CI] FA3: ascending cuda-graph capture to avoid varlen workspace IMA (#26532) (#26550)" (#26600)
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2026-05-28 13:17:37 -07:00 |
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Khoa Pham
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a38620b92c
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chore: add @pyc96 as codeowner for gemma4 files (#26601)
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2026-05-28 12:37:50 -07:00 |
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Vladislav Nosivskoy
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34ea682a07
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[UnifiedTree] gate load back pre-evict on full-attn availability only (#26302)
Signed-off-by: Vladislav Nosivskoy <vladnosiv@gmail.com>
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2026-05-29 00:30:03 +08:00 |
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 Yaochen Hanandronnie_zheng
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e33bbbb467
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[5/N] Quantization Refactor: GPTQ schemes and kernel split (#26402)
Co-authored-by: ronnie_zheng <zl19940307@163.com>
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2026-05-28 17:15:16 +03:00 |
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mispa-ms
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d616b8edad
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[diffusion][jit_kernel] perf: varlen FA fast path for USPAttention masked branch (#26318)
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2026-05-28 21:26:09 +08:00 |
|
 
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be32df33b9
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[MUSA] Fix startup with patched torchada (#26437)
Co-authored-by: popsiclexu <zhenxue.xu@mthreads.com>
Co-authored-by: R0CKSTAR <xiaodong.ye@mthreads.com>
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2026-05-28 20:57:55 +08:00 |
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Jiajun Li
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f4eac50389
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Fix GemmaRMSNorm gemma_weight buffer storage for Qwen3.5 (#26430)
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2026-05-28 18:42:46 +08:00 |
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Liangsheng Yin
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8e0ed75f2d
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Remove dead fields and always-False plumbing across SB / FB / LogitsMetadata (#26551)
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2026-05-28 03:15:04 -07:00 |
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Liangsheng Yin
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f143d54d78
|
Add env-var-conventions skill (#26553)
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2026-05-28 02:58:37 -07:00 |
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syy-hw
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c397a21167
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[Ascend NPU] Enable GLM-4.6V series models inference (#26146)
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2026-05-28 17:27:12 +08:00 |
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Bingxu Chen
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bdfd5da53e
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[AMD] AITER Upgrade (#26562)
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2026-05-28 02:04:58 -07:00 |
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Xingyu Liu
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578d27e56a
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[bugfix] Honor cast_x_before_out_mul in RMSNorm.forward_cuda residual path (#25920)
Signed-off-by: Xingyu Liu <charlotteliu12x@gmail.com>
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2026-05-28 01:22:46 -07:00 |
|
 Cheng WanandClaude Opus 4.7
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12e28bdf0c
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Fix FlashInfer SWA EXTEND-with-prefix correctness in merge_state path (#26513)
Co-authored-by: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
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2026-05-28 01:16:58 -07:00 |
|
 Cheng WanandClaude Opus 4.7
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00cd6fb3d9
|
Add sliding-window mask support to TorchNativeAttnBackend (#26516)
Co-authored-by: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
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2026-05-28 01:06:57 -07:00 |
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ZeyuanChen2000
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a245cae3d1
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[NPU] fix model ERNIE-4.5-21B-A3B-PT bias need 1D error (#26038)
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2026-05-28 16:05:39 +08:00 |
|
 Cheng WanandClaude Opus 4.7
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8ca09a30f1
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Allow Optional key/value in unified_attention_with_output split-op (MLA absorb fix) (#26515)
Co-authored-by: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
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2026-05-28 01:04:07 -07:00 |
|
 Cheng WanandClaude Opus 4.7
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b429a30428
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Expose Flex attention causal/decode masks as static methods (#26514)
Co-authored-by: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
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2026-05-28 01:03:32 -07:00 |
|
 Cheng WanandClaude Opus 4.7
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e5f5d84780
|
Fix FA DRAFT_EXTEND_V2 cache extent (#26512)
Co-authored-by: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
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2026-05-28 00:56:23 -07:00 |
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Xingyu Liu
|
770c51b127
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[Bug] Forward fixed_split_size in SWA / cross-attention paths of FlashInfer backend (#26412)
Signed-off-by: Xingyu Liu <charlotteliu12x@gmail.com>
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2026-05-28 00:52:26 -07:00 |
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Liangsheng Yin
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8dca6291c7
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[CI] FA3: ascending cuda-graph capture to avoid varlen workspace IMA (#26532) (#26550)
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2026-05-28 00:50:35 -07:00 |
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 DarkSharpnessandClaude Opus 4.7
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8f21b3e2ef
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[Refactor] JIT kernel benchmark (#25274)
Co-authored-by: Claude Opus 4.7 <noreply@anthropic.com>
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2026-05-28 00:49:55 -07:00 |
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hanwlax
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794fdd39ef
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fix: adapt dots_vlm for transformers v5 (#25829)
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2026-05-28 15:26:13 +08:00 |
|
 Brayden Zhongandb8zhong
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50e0b3b77f
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Support Flashinfer Cute-DSL MLA attention (#24737)
Co-authored-by: b8zhong <b8zhong@users.noreply.github.com>
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2026-05-28 00:21:32 -07:00 |
|
 Brayden Zhongandb8zhong
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e31ea50df8
|
Remove DeepGEMM for indexer GEMM in piecewise NSA path (#26494)
Co-authored-by: b8zhong <b8zhong@users.noreply.github.com>
|
2026-05-28 00:15:23 -07:00 |
|
Liangsheng Yin
|
686ef50672
|
Group ScheduleBatch and ForwardBatch fields by data-flow role (#26022)
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2026-05-28 00:11:20 -07:00 |
|
 Brayden Zhongandb8zhong
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b4808d44da
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Use Cute-DSL MXFP8 quantize kernels (#25486)
Co-authored-by: b8zhong <b8zhong@users.noreply.github.com>
|
2026-05-28 00:01:31 -07:00 |
|
Brayden Zhong
|
97dd6aad60
|
Add a little env var for disabling Flashinfer autotune cache (#26193)
|
2026-05-27 23:59:59 -07:00 |
|
Xinyuan Tong
|
bed20249f1
|
fix(tool_call): reland schema type normalization (#26433)
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2026-05-28 14:31:18 +08:00 |
|
 Bingxu Chenandyctseng0211
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6f85957ff2
|
[AMD] Fix aiter checkout (rocm dockerfile) (#26544)
Co-authored-by: yctseng0211 <yctseng@amd.com>
|
2026-05-28 14:25:01 +08:00 |
|
 Mike QiuandMike_Qiu
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8ff66b707f
|
feat: convert mm_hashes to str in encode_server for Mooncake key compat (#26487)
Co-authored-by: Mike_Qiu <qiudayu.qdy@antgroup.com>
|
2026-05-28 14:16:29 +08:00 |
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YC Yen-Ching Tseng
|
505f37a63d
|
[AMD] force AITER checkout to bypass CSV CRLF/LF smudge dirty state (#26535)
|
2026-05-28 14:05:53 +08:00 |
|
Xiaoyu Zhang
|
e60f799b40
|
Enable Kimi-K2.5 piecewise CUDA graph (#26382)
|
2026-05-27 22:51:33 -07:00 |
|
Alison Shao
|
5018e5c969
|
[CI] /rerun-test: support glob wildcard patterns (#26422)
|
2026-05-27 21:55:58 -07:00 |
|
 Khoa PhamandClaude Opus 4.7
|
9040feebd8
|
[Gemma4] Add test for MTP models (#24552)
Co-authored-by: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
|
2026-05-27 21:36:28 -07:00 |
|
Jay Chun
|
b437a0d066
|
Fix PD decode radix cache double-counting cached_tokens (#25973)
|
2026-05-28 11:50:03 +08:00 |
|
 
|
9fea20a078
|
update XPU Dockerfile (#25174)
Signed-off-by: Matrix Yao <matrix.yao@intel.com>
Co-authored-by: MingxuZh <109504044+MingxuZh@users.noreply.github.com>
Co-authored-by: Ma Mingfei <mingfei.ma@intel.com>
|
2026-05-28 10:58:09 +08:00 |
|
Chunyuan WU
|
714fdd9723
|
Fix MiniMax-M2.7 on CPU (#25061)
|
2026-05-28 10:53:13 +08:00 |
|
MingxuZh
|
21ba329dac
|
[Xeon] CPU CI enhancement for Intel Xeon platforms (#24649)
|
2026-05-28 10:49:04 +08:00 |
|
 Bingxu ChenandCursor
|
81663cb5f1
|
[AMD] [CI] Register MI35x GSM8K nightly tests (#26478)
Co-authored-by: Cursor <cursoragent@cursor.com>
|
2026-05-28 10:31:43 +08:00 |
|
Shaoting
|
14c1bb2721
|
[Feat][LMCache] Support LMCache mp mode (#24089)
Signed-off-by: Shaoting-Feng <stfeng@uw.edu>
|
2026-05-28 10:15:09 +08:00 |
|
jvzibro
|
421bda6d85
|
[Bug Fix] Remove H20 device check for FlashInfer AllReduce Fusion (#26470)
|
2026-05-28 00:45:55 +00:00 |
|
YAMY
|
eae03ce3b2
|
refactor(dsv4): route MHC prenorm through DeepGEMM wrapper (#26238)
|
2026-05-27 17:45:45 -07:00 |
|
 Baizhou ZhangandClaude Opus 4.7
|
68e5b4fdd6
|
[NemotronH] Fix weight-loading unit test broken by Puzzle support (#26522)
Co-authored-by: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
|
2026-05-27 17:44:45 -07:00 |
|
Netanel Haber
|
0abe6a85a5
|
Support NemotronHPuzzleForCausalLM (#24429)
Signed-off-by: Netanel Haber <58652339+netanel-haber@users.noreply.github.com>
|
2026-05-27 16:12:44 -07:00 |
|
Alison Shao
|
7c421ed3ec
|
[CI] runner-utilization: count in-flight queue waits + per-job status/links (#26509)
|
2026-05-27 16:06:55 -07:00 |
|
Qiaolin Yu
|
561e54f803
|
Update kimi k25 launch command in cookbook (#26511)
|
2026-05-27 16:04:04 -07:00 |
|
Mick
|
24bcb37efb
|
[diffusion] fix: fix diffusion LoRA consistency cases (#26327)
|
2026-05-28 06:29:35 +08:00 |
|
+2        
|
deaba74745
|
[AMD][DSV4] DSV4 MTP graph + sparse triton attn optimizations (#26383)
Co-authored-by: wunhuang <wunhuang@amd.com>
Co-authored-by: Thomas Wang <1am9trash@gmail.com>
Co-authored-by: Xinyi Song <86638975+RolaoDenthu@users.noreply.github.com>
Co-authored-by: HaiShaw <hixiao@gmail.com>
Co-authored-by: amd-danli103 <danli103@amd.com>
Co-authored-by: Lin, Soga <soga.lin@amd.com>
Co-authored-by: Raiden-Makoto <Raiden-Makoto@users.noreply.github.com>
Co-authored-by: Hubert Lu <55214931+hubertlu-tw@users.noreply.github.com>
Co-authored-by: yichiche@amd.com <jacky.cheng>
Co-authored-by: yctseng0211 <yctseng@amd.com>
Co-authored-by: Bingxu Chen <bingxche@amd.com>
|
2026-05-27 15:23:35 -07:00 |
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