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Author SHA1 Message Date
Ke Bao 5aaa18207c Revert "[CI] Add e2e test for dp-attention local control broadcast" (#39828) 2026-09-16 23:41:50 +08:00
Kan WuandClaude Fable 5.1 e41026f434 [sgl-router] Forward input_ids only for string content; count tokenize errors only when forwardable (#39458) 
Co-authored-by: Claude Fable 5.1 <noreply@anthropic.com>
 2026-09-16 22:49:41 +08:00
ymren cc171fbad0 feat: support custom OTLP trace service name (#35802) 2026-09-16 22:37:42 +08:00
pllimax 00a9a81b67 [NPU][CI] Fail fast and speed up long-running qwen3.6 accuracy cases (#39813) 2026-09-16 20:20:37 +08:00
ShunkangzandZhangheng e7f7447333 [kv-shard 2/4] Sharded pools (#37615) 
Co-authored-by: Zhangheng <hzh0425@apache.org>
 2026-09-16 19:22:23 +08:00
Sam ShleiferSam ShleiferClaude Fable 5.1
 		76e06febab [CI] Add e2e test for dp-attention local control broadcast (#39437) 
Co-authored-by: Sam Shleifer <sam@thinkingmachines.ai>
Co-authored-by: Claude Fable 5.1 <noreply@anthropic.com>
 2026-09-16 18:11:40 +08:00
Aurick QiaoandAurick Qiao 7b7620774c Fix device context during NIXL backend initialization (#38774) 
Co-authored-by: Aurick Qiao <6137920+aurickq@users.noreply.github.com>
 2026-09-16 17:59:24 +08:00
inkcherryandDuyi-Wang a3bf25dc62 [AMD] Clamp MORI intranode grid GPUs (#39763) 
Co-authored-by: Duyi-Wang <duyi.wang@amd.com>
 2026-09-16 02:13:59 -07:00
+4
Liangsheng YinCheng WanClaude Opus 5CursorDarkSharpnessDarkSharpnessKe BaoKhoa PhamXiaoyu ZhangXiaoyu ZhangYuhao YangYuwei AnZhichen ZengZiyi Xu
 		7d5696b3a1 dsv4.1: communication kernels and wrappers (#39653) 
Co-authored-by: Cheng Wan <54331508+ch-wan@users.noreply.github.com>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
Co-authored-by: DarkSharpness <2040703891@qq.com>
Co-authored-by: DarkSharpness <76582120+DarkSharpness@users.noreply.github.com>
Co-authored-by: Ke Bao <ispobaoke@gmail.com>
Co-authored-by: Khoa Pham <khoa.pham@radixark.ai>
Co-authored-by: Xiaoyu Zhang <1182563586@qq.com>
Co-authored-by: Xiaoyu Zhang <xiaoyu.zhang@radixark.ai>
Co-authored-by: Yuhao Yang <47235274+yhyang201@users.noreply.github.com>
Co-authored-by: Yuwei An <ayw.sirius19@gmail.com>
Co-authored-by: Zhichen Zeng <zczeng@uw.edu>
Co-authored-by: Ziyi Xu <ziyi.xu@radixark.ai>
 2026-09-16 02:09:40 -07:00
Bingxu Chen 5a0c1e21e9 [AMD] Preserve deterministic inference when Lean Attention is enabled (#37740) 2026-09-16 02:09:08 -07:00
Bingxu Chen 2cbfaefbf9 [AMD] Avoid the FP8 wo_a path when the weight is BF16 (#38453) 
Signed-off-by: bingxche <bingxche@amd.com>
 2026-09-16 01:57:15 -07:00
Jensenandronnie_zheng 5212797880 [NPU] fix npu docker workspace directory (#39732) 
Signed-off-by: xiedeyantu <czjourney@163.com>
Co-authored-by: ronnie_zheng <zl19940307@163.com>
 2026-09-16 11:51:38 +03:00
Liangsheng YinandBBuf fc5a979f21 [misc] Merge FlashInfer autotune caches across spec workers, pad MXFP4 TP shards, drop dead ngram attrs (#39678) 
Co-authored-by: BBuf <1182563586@qq.com>
 2026-09-16 01:50:29 -07:00
vstone-w 0e528dc9ff bugfix:fix unifiedcache c128 radix cache management (#39426) 2026-09-16 16:47:42 +08:00
Kangyan-ZhouKangyan ZhouClaude Opus 5
 		8baeded6f3 [Router] Pin to the prefix owner when the whole fleet is queueing (--saturation-queue-floor) (#39169) 
Co-authored-by: Kangyan Zhou <kangyan.zhou@radixark.ai>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
 2026-09-16 16:16:24 +08:00
Alison Shao ad28b91fae ci: fix always-failing coverage job, add by-GPU-count view (#39697) 2026-09-16 01:13:08 -07:00
Void 9c8d4641ff [Fix] Fix GLM5 mHC PP forward (#39720) 2026-09-16 00:32:53 -07:00
Kangyan-ZhouKangyan ZhouClaude Opus 5
 		54f0d72adf [Router] Fleet-wide sampling contract 2/3: enforce and inject per request (#39001) 
Co-authored-by: Kangyan Zhou <kangyan.zhou@radixark.ai>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
 2026-09-16 00:29:33 -07:00
Kangyan-ZhouKangyan ZhouClaude Opus 5
 		7835f1de9a [Router] Add the shutdown-drain configuration surface (#39015) 
Co-authored-by: Kangyan Zhou <kangyan.zhou@radixark.ai>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
 2026-09-16 00:26:50 -07:00
Jensen 5beb2fd552 [NPU] Avoid device synchronization in Ascend sampling (#39404) 2026-09-16 10:15:16 +03:00
Kangyan-ZhouKangyan ZhouClaude Opus 5
 		e2d56bbbfc [Router] Bound the e2e worker memory budget so prefill graph capture stops OOMing (#39713) 
Co-authored-by: Kangyan Zhou <kangyan.zhou@radixark.ai>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
 2026-09-16 00:13:09 -07:00
Kangyan-ZhouKangyan ZhouClaude Opus 5
 		d634320e48 [Router] Count open HTTP exchanges until their response body finishes (#39014) 
Co-authored-by: Kangyan Zhou <kangyan.zhou@radixark.ai>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
 2026-09-16 00:04:38 -07:00
+4
Liangsheng YinBBufCheng WanClaude Opus 5CursorDarkSharpnessDarkSharpnessKe BaoKhoa PhamXiaoyu ZhangYuhao YangYuwei AnZhichen ZengZiyi Xu
 		faaff1eca8 dsv4.1: Top-k kernels and candidate selection (#39648) 
Co-authored-by: BBuf <1182563586@qq.com>
Co-authored-by: Cheng Wan <54331508+ch-wan@users.noreply.github.com>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
Co-authored-by: DarkSharpness <2040703891@qq.com>
Co-authored-by: DarkSharpness <76582120+DarkSharpness@users.noreply.github.com>
Co-authored-by: Ke Bao <ispobaoke@gmail.com>
Co-authored-by: Khoa Pham <khoa.pham@radixark.ai>
Co-authored-by: Xiaoyu Zhang <1182563586@qq.com>
Co-authored-by: Xiaoyu Zhang <xiaoyu.zhang@radixark.ai>
Co-authored-by: Yuhao Yang <47235274+yhyang201@users.noreply.github.com>
Co-authored-by: Yuwei An <ayw.sirius19@gmail.com>
Co-authored-by: Zhichen Zeng <zczeng@uw.edu>
Co-authored-by: Ziyi Xu <ziyi.xu@radixark.ai>
 2026-09-15 23:54:35 -07:00
Hank Han a64be2e430 [Kernel] Add H20 block-FP8 MoE configs for GLM-5.3-Flash EP4/EP8 (#38913) 2026-09-15 23:42:18 -07:00
Shuwen WangandZhangheng 6b33338242 [HiCache] Forward prefix metadata to v2 storage calls (#39567) 
Co-authored-by: Zhangheng <hzh0425@apache.org>
 2026-09-16 14:05:42 +08:00
Liangsheng Yin 91f691c490 dsv4.1: standalone kernels and Python wrappers (#39646) 2026-09-15 22:31:18 -07:00
Kangyan-ZhouKangyan ZhouClaude Opus 5
 		afde31a2f5 [router] Speak cleartext h2c on both edges: serve it inbound, forward it outbound (#39006) 
Co-authored-by: Kangyan Zhou <kangyan.zhou@radixark.ai>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
 2026-09-15 22:30:31 -07:00
Kangyan-ZhouKangyan ZhouClaude Opus 5
 		c1f5b4736a [Router] Add --worker-queue-limit: stop sending cache-affinity traffic to a queueing worker (#39168) 
Co-authored-by: Kangyan Zhou <kangyan.zhou@radixark.ai>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
 2026-09-16 13:24:48 +08:00
Shangming CaiandClaude Opus 5 3f8eb35ead [PD] Do not admit intake-rejected requests to a PD handoff (#38935) 
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
 2026-09-16 12:44:49 +08:00
Dayananda VandClaude Opus 5 100e1cd0d9 [Fix] Spawn, don't fork, the benchmark server process (#34712) 
Co-authored-by: Claude Opus 5 <noreply@anthropic.com>
 2026-09-16 12:44:09 +08:00
Kangyan-ZhouKangyan ZhouClaude Opus 5
 		5f17e3a75f [Router] Fleet-wide sampling contract 1/3: the config surface (#39000) 
Co-authored-by: Kangyan Zhou <kangyan.zhou@radixark.ai>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
 2026-09-15 21:39:06 -07:00
Xinguo ZhuandAKatydid 4678536df6 [CPU] Add fp8_per_tensor_scaled_mm_cpu kernel (#32618) 
Co-authored-by: AKatydid <xinguojoe@gmail.com>
 2026-09-16 12:31:05 +08:00
Thomas Wang f60652a43e [AMD] Update deepseek-v4 PDI and cache policy setting for agentic workload (#39702) 2026-09-15 21:16:30 -07:00
Xiaoyu Zhang 444b29c932 [Diffusion] Clean up obsolete worker plumbing, dead helpers, and tests (#39293) 2026-09-16 12:11:45 +08:00
Xinyi Song 954bb6804a [AMD][bugfix] Fix DSV4 MTP crash (#39547) 2026-09-15 21:10:23 -07:00
Xiaoyu Zhang 537ac52c5b [SRT] Clean up no-op compiler pass, dead helpers, and migration tests (#39295) 2026-09-16 12:04:21 +08:00
Zhang, Jiejing 6331e43081 [AMD] Prefer HIP Top-K for GLM-5.x on ROCm (#39631) 2026-09-15 20:55:57 -07:00
jacky.chengandChangLiu0709 a9bb4d7d45 [AMD] Align Qwen3.5 MI355X HiCache cookbook with kernel / page_first (#39572) 
Co-authored-by: ChangLiu0709 <cliu1004@amd.com>
 2026-09-16 11:22:28 +08:00
chx96642264 5f6dd44edc [NPU] [bugfix] Fix undefined require_attn_tp_allgather (#39561) 2026-09-16 11:02:40 +08:00
Mohammad Miadh AngkadandMohammad Angkad 935cbf24ec Accept MXFP8 dispatch in FlashInfer A2A TRT-LLM MoE (#39613) 
Co-authored-by: Mohammad Angkad <mohammad.angkad@radixark.ai>
 2026-09-15 19:23:15 -07:00
Rahul Vijayaraghavan d4ad368ed9 [Intel XPU] Enable fused_moe_triton tuning on XPU and add tuned DeepSeek-OCR-2 configs (#28723) 2026-09-16 10:20:22 +08:00
Cao E f11cd8ab0e [XPU] Use torch scaled_mm for XPU block FP8 linear (#35605) 2026-09-16 10:10:31 +08:00
Yuxingwang-intelandMa Mingfei 2cb51f5d22 [CPU] [Diffusion] Add fused scale-shift and norm kernels for CPU (#33452) 
Co-authored-by: Ma Mingfei <mingfei.ma@intel.com>
 2026-09-16 10:01:29 +08:00
Zhang, Jiejingandfanxingran f920be4b09 [AMD] GLM-5.2 NextN: cast draft fused MoE to per-channel FP8 (#39155) 
Co-authored-by: fanxingran <xingran.fan@amd.com>
 2026-09-15 18:56:48 -07:00
xiaobochen-amdJohnQinAMDJiejing Zhang
 		7eedd57ab0 [ROCm] Fix EAGLE spec-decode verify silently sampling greedy on HIP (#37134) 
Co-authored-by: JohnQinAMD <yanyuan.qin@amd.com>
Co-authored-by: Jiejing Zhang <jiejing.zhang@amd.com>
 2026-09-15 18:49:49 -07:00
Liangsheng Yin 2f7d04da5d dsv4.1: Rust extension modules for image preprocessing, KV pool names, and PD bootstrap (#39677) 2026-09-15 18:11:48 -07:00
Jinyan Yi dbd7281b06 fix(npu): fix hybrid KV transfer with PP prefill in PD disaggregation (#38402) 2026-09-16 09:10:17 +08:00
Zhiqiang Xie 4e9e407d37 [HiCache] Label radix-cache metrics per rank and split the "shrunk" prefetch reason (#39280) 2026-09-15 17:54:04 -07:00
Siyuan ChenandYuwei An c9a8fba991 [DSV4][BCG] Optimize the heavy memory use of C4 Indexer when BCG is enabled (#36534) 
Co-authored-by: Yuwei An <ayw.sirius19@gmail.com>
 2026-09-15 17:23:11 -07:00
Kangyan-ZhouKangyan ZhouClaude Opus 5
 		bbef93e22a [Router] Add a KV storage-tier coverage row to the Grafana dashboard (4/4) (#39111) 
Co-authored-by: Kangyan Zhou <kangyan.zhou@radixark.ai>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
 2026-09-15 17:09:11 -07:00