 chx96642264andsglang-npu-bot
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5640e53cab
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[NPU] [bugfix] Fix import of ggml_moe_a8_vec and Fix NPU MLA HiCache backup accessing missing data_ptrs (#36640)
Co-authored-by: sglang-npu-bot <sglangnpu@163.com>
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2026-08-27 16:14:48 -07:00 |
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Liangsheng Yin
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5d52f02f22
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[misc] Fold the allocator free-group flag into free_group (#36739)
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2026-08-27 16:12:47 -07:00 |
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Vedant V JhaveriandCopilot
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dc10483592
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[Kernel] Add H200 MoE configs for Qwen3.5 and Qwen3.6 (#35374)
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
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2026-08-27 16:01:22 -07:00 |
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skyandClaude
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0132848349
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Revert "[Fix] Disable --enable-symm-mem under CUDA graphs on Kimi hybrid models" (#34842)
Signed-off-by: wangfakang <fakangwang@gmail.com>
Co-authored-by: Claude <noreply@anthropic.com>
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2026-08-27 14:19:27 -07:00 |
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Yuwei AnandClaude Fable 5
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ff5578eb4e
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[1/N][Mix] Mixed Chunk Prefill Base (#36288)
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
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2026-08-27 12:59:56 -07:00 |
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Cheng WanandClaude Opus 5
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6ff2a20ccf
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config: the record is not an object that gets passed around (#36622)
Co-authored-by: Claude Opus 5 <noreply@anthropic.com>
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2026-08-27 12:57:10 -07:00 |
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Cheng WanandClaude Opus 5
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fd40a331bf
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config: a parallel size has one spelling; a patched scope declares its own (#36621)
Co-authored-by: Claude Opus 5 <noreply@anthropic.com>
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2026-08-27 12:56:42 -07:00 |
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Cheng WanandClaude Opus 5
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ca1d7ed8e6
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config: a parallel leaf with no live counterpart is read bare (#36620)
Co-authored-by: Claude Opus 5 <noreply@anthropic.com>
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2026-08-27 12:56:11 -07:00 |
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Cheng WanandClaude Opus 5
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7c3b5a6732
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config: every handler declares its cuda-graph decisions (#36725)
Co-authored-by: Claude Opus 5 <noreply@anthropic.com>
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2026-08-27 12:55:34 -07:00 |
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Cheng WanandClaude Opus 5
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bd4bb1781a
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config: resolution declares, and nothing writes a field (#36618)
Co-authored-by: Claude Opus 5 <noreply@anthropic.com>
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2026-08-27 12:53:17 -07:00 |
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Lianmin Zheng
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a0a2295271
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Refactor server_args constants and layout (#36676)
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2026-08-27 12:16:16 -07:00 |
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Mickandjohn.xh
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20a491d1d3
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[Fix] Re-encode multimodal embeddings after cache mismatch (#36595)
Co-authored-by: john.xh <dengxuhuijohn@gmail.com>
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2026-08-27 23:24:30 +08:00 |
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Xiaoyu Zhang
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024a7a1031
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[diffusion] Fix native LingBot-Video text encoding (#36542)
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2026-08-27 22:58:22 +08:00 |
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inkcherry
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8ad76415e2
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[PD][mori] Align prefill transfer control plane for unified control plane (#36160)
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2026-08-27 21:43:13 +08:00 |
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Xiaoyu Zhang
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a7e3f590ca
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[Diffusion] Fuse LongCat residual gate updates (#36577)
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2026-08-27 21:07:04 +08:00 |
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Xiaoyu Zhang
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e061dd1b47
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[Diffusion][Kernel] Fuse Wan FFN GELU epilogue (#36592)
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2026-08-27 21:06:28 +08:00 |
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Xiaoyu Zhang
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1af95ffded
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[diffusion] Fuse Cosmos3 Nano T2I attention on Hopper (#36571)
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2026-08-27 20:59:15 +08:00 |
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Xiaoyu Zhang
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db4125bb56
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[diffusion] Accept mesh benchmark artifacts (#36553)
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2026-08-27 20:53:25 +08:00 |
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Xiaoyu Zhang
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d42fa5e10a
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[diffusion] align video BCG warmup frame count (#36485)
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2026-08-27 20:52:00 +08:00 |
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xdtbynd
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b647ae82f5
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[NPU][Bugfix] Fix OOB gather in decode KV allocation when free pool is tight (#35727)
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2026-08-27 19:44:45 +08:00 |
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97ba99067d
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Publish per-scheduler load on a dedicated socket for load-aware routers (#34608)
Co-authored-by: Kangyan Zhou <zky314343421@gmail.com>
Co-authored-by: Zhangheng <hzh0425@apache.org>
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2026-08-27 19:33:18 +08:00 |
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Lianmin Zheng
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94183a8d2b
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Move server args config parser under utils (#36681)
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2026-08-27 03:34:50 -07:00 |
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Xiaoyu Zhang
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ad911a5ec0
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[kernel] Tune LingBot-Video MoE TMA configs for H100 (#36543)
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2026-08-27 02:47:32 -07:00 |
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Schwinn Saereesitthipitak
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08315c56df
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[Fix] Account resident weight memory in KV sizing (#34053)
Signed-off-by: Schwinn Saereesitthipitak <schwinns@nvidia.com>
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2026-08-27 02:43:04 -07:00 |
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Xia Weiwen
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56fdfc3b26
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XPU: remove SGLANG_USE_SGL_XPU flag (#34492)
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2026-08-27 02:38:02 -07:00 |
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Khoa Pham
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78d36f5f62
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fix: kill_process_tree waits for the reap by default (#36589)
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2026-08-27 02:34:05 -07:00 |
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AMD-yanfeiwang
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2ded8a6aea
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[AMD] Enable moe_a2a_backend=mori for DeepSeek-V4 prefill context parallelism (#35611)
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2026-08-27 02:31:41 -07:00 |
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Lianmin Zheng
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3402265989
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[Core] Refactor server argument choices (#36586)
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2026-08-27 01:56:03 -07:00 |
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MickandClaude Opus 5
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c2c3320cf0
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[VLM] feat: size the multimodal preprocessing pool by where preprocessing runs (#35349)
Co-authored-by: Claude Opus 5 <noreply@anthropic.com>
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2026-08-27 16:32:58 +08:00 |
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b8a6adadfe
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[Bug][Spec] fix startup crash and reduce CUDA graph memory usage for speculative adaptive (#35275)
Co-authored-by: alphabetc1 <2508695655@qq.com>
Co-authored-by: Shuwen Wang <47200617+alphabetc1@users.noreply.github.com>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
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2026-08-27 00:46:13 -07:00 |
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jacky.cheng
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c967cd19b5
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[AMD] Optimize Qwen3.5 MTP unified attention on gfx950 (#36330)
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2026-08-27 00:13:49 -07:00 |
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72bf8c4d53
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[ci] xpu: trigger pr-test-xpu on multimodal_gen changes (#36100)
Co-authored-by: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
Co-authored-by: Ma Mingfei <mingfei.ma@intel.com>
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2026-08-27 14:50:26 +08:00 |
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Xun Sun
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adcf73d7f7
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[Weight Cache] Enhance test and support EPLB (#36198)
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2026-08-26 23:11:53 -07:00 |
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weireweireandweireweire
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ea48cb04cc
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Pin scheduler metadata before asynchronous H2D copies (#35944)
Co-authored-by: weireweire <20922698+weireweire@users.noreply.github.com>
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2026-08-26 22:21:47 -07:00 |
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jacky.cheng
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f775db03aa
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[AMD] Fix int32 seqused_k overflow in aiter draft-extend attention (#36541)
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2026-08-26 22:06:39 -07:00 |
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weireweireandweireweire
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4d5d506486
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Publish gated DSV4 DFLASH-family target-prefill read completion (#35947)
Co-authored-by: weireweire <20922698+weireweire@users.noreply.github.com>
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2026-08-26 21:33:08 -07:00 |
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Jialin Ouyang
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a2b589fdf8
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[Radix Cache] Add test-only TreeCore inspector for shared backend tests (#35791)
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2026-08-27 11:17:51 +08:00 |
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a3ae667d67
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[Feature] Add DeepEPv2 (ElasticBuffer) MoE A2A backend (#35634)
Co-authored-by: menyu <menyu@nvidia.com>
Co-authored-by: Jinyan Chen <93358689+liz-badada@users.noreply.github.com>
Co-authored-by: Han Yu <helloyu0903@gmail.com>
Co-authored-by: Cheng Wan <cheng.wan@radixark.ai>
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2026-08-26 19:54:33 -07:00 |
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AMD-yanfeiwang
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cbfe54fba8
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[AMD] Use fast exponentials in C4 and C128 ROCm kernels (#34296)
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2026-08-26 19:49:01 -07:00 |
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MickandClaude Opus 5
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07570202f0
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[VLM] route every multimodal processor through the worker pool's call site (#35342)
Co-authored-by: Claude Opus 5 <noreply@anthropic.com>
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2026-08-27 10:27:45 +08:00 |
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Zaili Wang
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5adc2880f9
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[CPU] Enable ERNIE models on CPU (#35222)
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2026-08-27 10:13:10 +08:00 |
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Promisewjx
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9d07b9e227
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[Performance] Reduce idle DP work in breakable prefill CUDA graphs (#33871)
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2026-08-27 10:09:54 +08:00 |
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Bingxu Chen
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4f59a8dcfa
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[AMD][Bugfix] Skip invalid fused MoE reduction for direct top-1 output (#36309)
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2026-08-26 18:52:15 -07:00 |
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Haotong Zou
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b658d64d5b
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[CPU] Fix rotary_embedding_cpu fake for in-place layouts (#36443)
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2026-08-27 09:48:07 +08:00 |
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Haotong Zou
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058f99c561
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[CPU] Fix truncated KV prefix in intel_amx spec verify (#36430)
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2026-08-27 09:42:36 +08:00 |
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Alison Shao
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15688fea7d
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Fix BailingMoeV3 reading enable_dp_lm_head off live topology instead of config (#36584)
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2026-08-26 18:41:39 -07:00 |
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Bingxu Chen
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862f9ed3d8
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[AMD] Fall back to CPU tensor for decode retraction on ROCm (#36343)
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2026-08-26 18:32:51 -07:00 |
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20621aa14b
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[Model] Support Ling-3.0-flash (BailingMoeV3) (#33561)
Signed-off-by: JustinTong <justintong0323@gmail.com>
Signed-off-by: Xinyuan Tong <xinyuantong.cs@gmail.com>
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
Co-authored-by: 得泽 <zhangkaihong.zkh@antgroup.com>
Co-authored-by: 翎悦 <vito.yy@antgroup.com>
Co-authored-by: 羽癫 <yudian.zy@antgroup.com>
Co-authored-by: tiwei.btw <tiwei.btw@antgroup.com>
Co-authored-by: Liangsheng Yin <hnyls2002@gmail.com>
Co-authored-by: 文赋 <zibin.zb@antgroup.com>
Co-authored-by: JustinTong <justintong0323@gmail.com>
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2026-08-26 17:27:23 -07:00 |
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paulzhang-tm
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8739d56a31
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[Spec] Generalize hybrid SWA MTP draft pool routing (#35379)
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2026-08-26 17:02:36 -07:00 |
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ec4bdbfa4a
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[Feature] Beam search support (#31626)
Co-authored-by: cswuyg <cswuyg@gmail.com>
Co-authored-by: cswuyg <496090217@qq.com>
Co-authored-by: Vedant Jhaveri <vedantjh2@gmail.com>
Co-authored-by: Vedant Jhaveri <vjhaveri@linkedin.com>
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2026-08-26 16:56:15 -07:00 |
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