XPU: remove SGLANG_USE_SGL_XPU flag (#34492)

This commit is contained in:
Xia Weiwen
2026-08-27 02:38:02 -07:00
committed by GitHub
parent 78d36f5f62
commit 56fdfc3b26
19 changed files with 96 additions and 46 deletions
+1 -2
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@@ -30,7 +30,6 @@ from sglang.srt.utils import (
is_npu,
is_xpu,
print_info_once,
use_intel_xpu_backend,
)
from sglang.srt.utils.multi_stream_utils import (
maybe_execute_in_parallel,
@@ -1266,7 +1265,7 @@ class VisionAttention(nn.Module):
elif _is_cpu and _is_cpu_amx_available:
backend = "amx_attn"
elif _is_xpu:
backend = "triton_attn" if not use_intel_xpu_backend() else "xpu_attn"
backend = "xpu_attn"
else:
backend = "sdpa"
if backend == "fa3" and is_blackwell_supported():
@@ -28,7 +28,7 @@ from sglang.srt.distributed.device_communicators.pynccl_allocator import (
)
from sglang.srt.layers.dp_attention import is_allocation_symmetric
from sglang.srt.layers.moe.moe_runner import MoeRunnerConfig
from sglang.srt.layers.moe.utils import get_moe_padding_size
from sglang.srt.layers.moe.utils import get_moe_padding_size, get_moe_runner_backend
from sglang.srt.runtime_context import get_exec
from sglang.srt.utils import (
cpu_has_amx_support,
@@ -38,7 +38,6 @@ from sglang.srt.utils import (
is_hip,
is_musa,
is_xpu,
use_intel_xpu_backend,
)
from sglang.srt.utils.custom_op import register_custom_op
@@ -54,7 +53,6 @@ _is_cpu_amx_available = cpu_has_amx_support()
_is_cpu = is_cpu()
_use_aiter = get_bool_env_var("SGLANG_USE_AITER") and _is_hip
_is_xpu = is_xpu()
_use_sgl_xpu = use_intel_xpu_backend()
_is_musa = is_musa()
@@ -1133,7 +1131,7 @@ def fused_moe(
Returns:
- torch.Tensor: The output tensor after applying the MoE layer.
"""
if _use_sgl_xpu:
if _is_xpu and not get_moe_runner_backend().is_triton():
topk_weight, topk_ids, _ = topk_output
from sgl_kernel import fused_experts as sgl_fused_experts
+4
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@@ -119,6 +119,7 @@ class MoeRunnerBackend(Enum):
EXPERIMENTAL_SGL_MARLIN = "experimental_sgl_marlin"
AITER = "aiter"
HPC_OPS = "hpc_ops"
INTEL_XPU = "intel_xpu"
def is_auto(self):
return self == MoeRunnerBackend.AUTO
@@ -182,6 +183,9 @@ class MoeRunnerBackend(Enum):
def is_aiter(self):
return self == MoeRunnerBackend.AITER
def is_intel_xpu(self):
return self == MoeRunnerBackend.INTEL_XPU
class DeepEPv2Fp8ScaleFormat(NamedTuple):
"""DeepGEMM FP8 activation-scale layout expected from DeepEP v2."""
+2 -5
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@@ -95,12 +95,12 @@ from sglang.srt.utils import (
is_sm90_supported,
is_sm100_supported,
is_sm120_supported,
is_xpu,
log_info_on_rank0,
mxfp8_block_convert_required,
print_warning_once,
set_weight_attrs,
use_intel_amx_backend,
use_intel_xpu_backend,
)
if TYPE_CHECKING:
@@ -2435,10 +2435,7 @@ class Fp8MoEMethod(FusedMoEMethodBase):
if quant_info is not None:
return self.runner.run(dispatch_output, quant_info)
if use_intel_xpu_backend() and not (
getattr(self, "runner", None) is not None
and self.runner.runner_backend.is_triton()
):
if is_xpu() and not get_moe_runner_backend().is_triton():
# sgl-kernel-xpu path
from sgl_kernel import fused_experts
@@ -42,9 +42,9 @@ from sglang.srt.utils import (
is_cuda,
is_hip,
is_npu,
is_xpu,
set_weight_attrs,
use_intel_amx_backend,
use_intel_xpu_backend,
)
from sglang.srt.utils.custom_op import register_custom_op
@@ -343,18 +343,20 @@ class UnquantizedLinearMethod(LinearMethodBase):
def _use_xpu_moe_ld_padding(use_triton_kernels: bool) -> bool:
"""Whether MoE expert weights should get a padded row stride for XPU.
use_intel_xpu_backend() only tells us an XPU exists on this machine, not
that the weights being created land on it -- the env var can be set while
serving on CPU/CUDA. create_weights takes no device argument and allocates
under the model loader's ambient device context, so check that context too:
padding a non-XPU weight would make it non-contiguous for no benefit, and
other backends' MoE kernels expect contiguous expert tensors.
is_xpu() only tells us an XPU exists on this machine, not that the weights
being created land on it -- this can be true while serving on CPU/CUDA.
create_weights takes no device argument and allocates under the model
loader's ambient device context, so check that context too: padding a
non-XPU weight would make it non-contiguous for no benefit, and other
backends' MoE kernels expect contiguous expert tensors.
The Triton path stores B transposed and does not read a row stride, so it
is excluded even on XPU.
is excluded even on XPU (either via --moe-runner-backend triton or the
triton_kernels build).
"""
return (
use_intel_xpu_backend()
is_xpu()
and not get_moe_runner_backend().is_triton()
and torch.get_default_device().type == "xpu"
and not use_triton_kernels
)
@@ -948,7 +950,7 @@ class UnquantizedFusedMoEMethod(FusedMoEMethodBase, BaseFusedOp):
], f"activation = {moe_runner_config.activation} is not supported."
backend = self.runner.runner_backend
if use_intel_xpu_backend():
if not get_moe_runner_backend().is_triton():
# sgl-kernel-xpu path
from sgl_kernel import fused_experts
@@ -974,7 +976,8 @@ class UnquantizedFusedMoEMethod(FusedMoEMethodBase, BaseFusedOp):
assert (
moe_runner_config.activation == "silu"
), f"activation = {moe_runner_config.activation} is not supported \
for Triton PATH, please set ENV SGLANG_USE_SGL_XPU=1."
for Triton PATH, please drop --moe-runner-backend triton to use \
the sgl-kernel-xpu path, which supports more activations."
quant_info = self.get_triton_quant_info(layer)
return self.runner.run(dispatch_output, quant_info)
+1
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@@ -305,6 +305,7 @@ MOE_RUNNER_BACKEND_CHOICES = [
"experimental_sgl_marlin",
"hpc_ops", # HPC-Ops (https://github.com/Tencent/hpc-ops), FP8 MoE on Hopper (SM90) only
"megamoe",
"intel_xpu",
]
add_moe_runner_backend_choices = MOE_RUNNER_BACKEND_CHOICES.extend
-4
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@@ -354,10 +354,6 @@ def xpu_has_xmx_support():
return False
def use_intel_xpu_backend():
return get_bool_env_var("SGLANG_USE_SGL_XPU") and is_xpu()
@lru_cache(maxsize=1)
def is_flashinfer_available():
"""