XPU: remove SGLANG_USE_SGL_XPU flag (#34492)
This commit is contained in:
@@ -30,7 +30,6 @@ from sglang.srt.utils import (
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is_npu,
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is_xpu,
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print_info_once,
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use_intel_xpu_backend,
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)
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from sglang.srt.utils.multi_stream_utils import (
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maybe_execute_in_parallel,
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@@ -1266,7 +1265,7 @@ class VisionAttention(nn.Module):
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elif _is_cpu and _is_cpu_amx_available:
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backend = "amx_attn"
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elif _is_xpu:
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backend = "triton_attn" if not use_intel_xpu_backend() else "xpu_attn"
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backend = "xpu_attn"
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else:
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backend = "sdpa"
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if backend == "fa3" and is_blackwell_supported():
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@@ -28,7 +28,7 @@ from sglang.srt.distributed.device_communicators.pynccl_allocator import (
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)
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from sglang.srt.layers.dp_attention import is_allocation_symmetric
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from sglang.srt.layers.moe.moe_runner import MoeRunnerConfig
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from sglang.srt.layers.moe.utils import get_moe_padding_size
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from sglang.srt.layers.moe.utils import get_moe_padding_size, get_moe_runner_backend
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from sglang.srt.runtime_context import get_exec
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from sglang.srt.utils import (
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cpu_has_amx_support,
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@@ -38,7 +38,6 @@ from sglang.srt.utils import (
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is_hip,
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is_musa,
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is_xpu,
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use_intel_xpu_backend,
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)
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from sglang.srt.utils.custom_op import register_custom_op
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@@ -54,7 +53,6 @@ _is_cpu_amx_available = cpu_has_amx_support()
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_is_cpu = is_cpu()
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_use_aiter = get_bool_env_var("SGLANG_USE_AITER") and _is_hip
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_is_xpu = is_xpu()
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_use_sgl_xpu = use_intel_xpu_backend()
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_is_musa = is_musa()
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@@ -1133,7 +1131,7 @@ def fused_moe(
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Returns:
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- torch.Tensor: The output tensor after applying the MoE layer.
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"""
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if _use_sgl_xpu:
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if _is_xpu and not get_moe_runner_backend().is_triton():
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topk_weight, topk_ids, _ = topk_output
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from sgl_kernel import fused_experts as sgl_fused_experts
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@@ -119,6 +119,7 @@ class MoeRunnerBackend(Enum):
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EXPERIMENTAL_SGL_MARLIN = "experimental_sgl_marlin"
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AITER = "aiter"
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HPC_OPS = "hpc_ops"
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INTEL_XPU = "intel_xpu"
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def is_auto(self):
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return self == MoeRunnerBackend.AUTO
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@@ -182,6 +183,9 @@ class MoeRunnerBackend(Enum):
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def is_aiter(self):
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return self == MoeRunnerBackend.AITER
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def is_intel_xpu(self):
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return self == MoeRunnerBackend.INTEL_XPU
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class DeepEPv2Fp8ScaleFormat(NamedTuple):
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"""DeepGEMM FP8 activation-scale layout expected from DeepEP v2."""
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@@ -95,12 +95,12 @@ from sglang.srt.utils import (
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is_sm90_supported,
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is_sm100_supported,
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is_sm120_supported,
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is_xpu,
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log_info_on_rank0,
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mxfp8_block_convert_required,
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print_warning_once,
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set_weight_attrs,
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use_intel_amx_backend,
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use_intel_xpu_backend,
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)
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if TYPE_CHECKING:
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@@ -2435,10 +2435,7 @@ class Fp8MoEMethod(FusedMoEMethodBase):
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if quant_info is not None:
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return self.runner.run(dispatch_output, quant_info)
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if use_intel_xpu_backend() and not (
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getattr(self, "runner", None) is not None
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and self.runner.runner_backend.is_triton()
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):
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if is_xpu() and not get_moe_runner_backend().is_triton():
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# sgl-kernel-xpu path
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from sgl_kernel import fused_experts
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@@ -42,9 +42,9 @@ from sglang.srt.utils import (
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is_cuda,
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is_hip,
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is_npu,
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is_xpu,
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set_weight_attrs,
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use_intel_amx_backend,
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use_intel_xpu_backend,
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)
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from sglang.srt.utils.custom_op import register_custom_op
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@@ -343,18 +343,20 @@ class UnquantizedLinearMethod(LinearMethodBase):
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def _use_xpu_moe_ld_padding(use_triton_kernels: bool) -> bool:
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"""Whether MoE expert weights should get a padded row stride for XPU.
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use_intel_xpu_backend() only tells us an XPU exists on this machine, not
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that the weights being created land on it -- the env var can be set while
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serving on CPU/CUDA. create_weights takes no device argument and allocates
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under the model loader's ambient device context, so check that context too:
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padding a non-XPU weight would make it non-contiguous for no benefit, and
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other backends' MoE kernels expect contiguous expert tensors.
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is_xpu() only tells us an XPU exists on this machine, not that the weights
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being created land on it -- this can be true while serving on CPU/CUDA.
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create_weights takes no device argument and allocates under the model
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loader's ambient device context, so check that context too: padding a
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non-XPU weight would make it non-contiguous for no benefit, and other
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backends' MoE kernels expect contiguous expert tensors.
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The Triton path stores B transposed and does not read a row stride, so it
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is excluded even on XPU.
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is excluded even on XPU (either via --moe-runner-backend triton or the
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triton_kernels build).
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"""
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return (
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use_intel_xpu_backend()
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is_xpu()
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and not get_moe_runner_backend().is_triton()
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and torch.get_default_device().type == "xpu"
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and not use_triton_kernels
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)
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@@ -948,7 +950,7 @@ class UnquantizedFusedMoEMethod(FusedMoEMethodBase, BaseFusedOp):
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], f"activation = {moe_runner_config.activation} is not supported."
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backend = self.runner.runner_backend
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if use_intel_xpu_backend():
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if not get_moe_runner_backend().is_triton():
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# sgl-kernel-xpu path
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from sgl_kernel import fused_experts
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@@ -974,7 +976,8 @@ class UnquantizedFusedMoEMethod(FusedMoEMethodBase, BaseFusedOp):
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assert (
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moe_runner_config.activation == "silu"
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), f"activation = {moe_runner_config.activation} is not supported \
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for Triton PATH, please set ENV SGLANG_USE_SGL_XPU=1."
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for Triton PATH, please drop --moe-runner-backend triton to use \
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the sgl-kernel-xpu path, which supports more activations."
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quant_info = self.get_triton_quant_info(layer)
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return self.runner.run(dispatch_output, quant_info)
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@@ -305,6 +305,7 @@ MOE_RUNNER_BACKEND_CHOICES = [
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"experimental_sgl_marlin",
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"hpc_ops", # HPC-Ops (https://github.com/Tencent/hpc-ops), FP8 MoE on Hopper (SM90) only
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"megamoe",
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"intel_xpu",
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]
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add_moe_runner_backend_choices = MOE_RUNNER_BACKEND_CHOICES.extend
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@@ -354,10 +354,6 @@ def xpu_has_xmx_support():
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return False
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def use_intel_xpu_backend():
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return get_bool_env_var("SGLANG_USE_SGL_XPU") and is_xpu()
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@lru_cache(maxsize=1)
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def is_flashinfer_available():
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"""
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