Commit Graph
14 Commits
Author SHA1 Message Date
Nicolas Castet 51b3ed02ca Fix bug in symm mem pre-allocation default (#19082) 2026-02-21 11:51:28 +08:00
Nicolas Castet 3358ba8945 [Fix] Run FlashInfer autotune on non-default stream for NCCL 2.29+ compatibility (#18987) 2026-02-20 23:21:38 +08:00
Nicolas Castet 99df920cdb Register tensors with symmetric memory for qwen (#18643) 2026-02-20 09:32:32 +08:00
Nicolas Castet 315306d8a9 Make sure we always disable symm memory without dp padding (#18129) 2026-02-04 19:58:28 +08:00
Nicolas Castet 48e9daadff Support symmetric memory pre-allocation to avoid fragmentation (#17089) 2026-01-23 17:57:04 +08:00
Nicolas Castet 9d8bbd4223 Add clear error message when OOM with symmetric memory (#17038) 2026-01-16 20:44:37 +08:00
b0a26ba624 Add support for bf16 x bf16 cutlass fused MoE (#10275)
Co-authored-by: Sam Li <lsam@nvidia.com>
Co-authored-by: jackeyhua <jackeyhuasjtu@gmail.com>
2025-11-24 18:49:39 -08:00
Nicolas Castet 3a64844a1c Fix hang in deepgemm compilation with symmetric memory enabled (#12715) 2025-11-06 14:06:22 -08:00
Nicolas Castet 2340798353 Register allgather/reducescatter buffers with symm memory (#12572) 2025-11-04 17:11:36 -08:00
Nicolas Castet 1c304aa9bc Log iteration # for prefill and decode (#9366) 2025-10-23 12:28:03 -07:00
Nicolas Castet c10b8e6a0f Support DP attention with GPT-OSS (#9359) 2025-08-20 16:36:31 -07:00
Nicolas Castet 6b7c24712c Fix broken trtllm_mha attn backend with gpt-oss (#9161) 2025-08-13 16:40:55 -07:00
Nicolas Castet 82e6c3a65a Add support for NCCL symmetric memory for TP allreduces (#8238) 2025-08-01 23:30:55 +00:00
Nicolas Castet 127998cc41 Fix allgather ops inside cuda graphs (#3709) 2025-02-25 08:39:10 -08:00