Mick
|
4a4f063b79
|
[diffusion] fix: paint multiview vae must follow unit dtype (#29041)
|
2026-06-24 23:54:01 +08:00 |
|
 qiaozpandishandhanani
|
03773ae35b
|
[HiCache] Add NIXL FILE cache cleaner (#28258)
Co-authored-by: ishandhanani <82981111+ishandhanani@users.noreply.github.com>
|
2026-06-24 08:13:55 -07:00 |
|
Mick
|
09b808ab7e
|
[diffusion] fix: fix Qwen-Image-Layered latent shape (#28832)
|
2026-06-24 20:57:54 +08:00 |
|
nvjullin
|
84a7a84018
|
[PD] Fix data race in NixlKVManager for NIXL backend (#28897)
|
2026-06-24 18:11:01 +08:00 |
|
 hirakunaramuka2andClaude Fable 5
|
7430c56b20
|
[Misc] Use logger instead of print() in utils/common.py (#29004)
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
|
2026-06-24 09:45:01 +00:00 |
|
zhaozx-cn
|
10e0bcd622
|
[NPU] fix dcp break (#29140)
|
2026-06-24 17:33:02 +08:00 |
|
Mohammad Miadh Angkad
|
4992f7a108
|
Fix TRTLLM MHA FP8 KV cache scale handling (#28144)
|
2026-06-24 01:43:50 -07:00 |
|
Liangsheng Yin
|
8e1988b746
|
[Perf] Overlap result D2H copy with the next forward step (#29075)
|
2026-06-24 01:34:02 -07:00 |
|
Even Zhou
|
4da23fdc35
|
[NPU] removes deprecated pr testing files (#27859)
|
2026-06-24 16:06:45 +08:00 |
|
Tai An
|
00eac7ec9b
|
[diffusion] fix: disable proxy env in warmup health probe (#28503)
|
2026-06-24 15:58:44 +08:00 |
|
 ![gemini-code-assist[bot]](/assets/img/avatar_default.png)
|
5f76736427
|
kimik2_detector fix the normal text detection before tool call. (#25071)
Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com>
Co-authored-by: Rohit Harkhani <rharkhani@gmail.com>
|
2026-06-24 15:53:22 +08:00 |
|
 weibingoandZhangheng
|
b6a8000473
|
[bugfix][decode hicache] _storage_hit_query use HybridPrefetchOperation (#28422)
Co-authored-by: Zhangheng <hzh0425@apache.org>
|
2026-06-24 15:13:48 +08:00 |
|
silencejade
|
6c6fa19a90
|
[NPU] Support fsdp for rl_on_policy_target (#29128)
|
2026-06-24 14:57:19 +08:00 |
|
Xiaoyu Zhang
|
26e1d4d847
|
[KDA-Pilot] Add B200 diffusion norm-scale-shift CUDA fast path for Qwen-Image (#27392)
|
2026-06-24 14:38:36 +08:00 |
|
 Yuan Luoandluoyuan.luo
|
0df796473b
|
[VLM] Qwen3-VL / Moss-VL ViT preprocessing optimizations (#28940)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
|
2026-06-24 14:36:29 +08:00 |
|
Xiaoyu Zhang
|
534ac98eb2
|
[codex] Optimize DMD Wan auto residency on high-memory GPUs (#28780)
|
2026-06-24 14:03:23 +08:00 |
|
 toufupiand“toufupi”
|
c394f812d1
|
[MLX] Fix Apple Silicon server startup; align MLX tests with upstream (#28770)
Co-authored-by: “toufupi” <“byte2016@outlook.com”>
|
2026-06-23 22:58:49 -07:00 |
|
 Yihao WangandClaude Opus 4.8
|
5beddc8afc
|
[Diffusion] Add Krea 2 support (#29052)
Co-authored-by: Claude Opus 4.8 <noreply@anthropic.com>
|
2026-06-23 22:56:51 -07:00 |
|
Tarushii Goel
|
24bf8d91bb
|
Refactor / simplify MultiLayerEagleDraftExtendCudaGraphRunner to use rotation (#28492)
|
2026-06-23 22:36:47 -07:00 |
|
 jiayisunxandMa Mingfei
|
bf231f01a3
|
[qwen3.5][XPU]Add XPU support for set_embed_and_head and fused QK RMSNorm kernel (#27870)
Co-authored-by: Ma Mingfei <mingfei.ma@intel.com>
|
2026-06-24 13:03:49 +08:00 |
|
Liangsheng Yin
|
e3f1fa9d8e
|
[misc] Unify benchmark deprecation shims and one_batch_server CLI entrypoint (#29108)
|
2026-06-23 21:10:25 -07:00 |
|
Alex Tumanov
|
52b89c4948
|
[misc] Add bench_serving compatibility shim (#28997)
|
2026-06-23 19:49:53 -07:00 |
|
Alex Tumanov
|
33373cbb12
|
[misc] Move bench_serving into sglang.benchmark (#28996)
|
2026-06-23 19:34:11 -07:00 |
|
Liangsheng Yin
|
f76c6c95be
|
[misc] Add sglang.bench_offline_throughput deprecation shim (#29085)
|
2026-06-23 18:39:58 -07:00 |
|
Liangsheng Yin
|
b448b08401
|
[misc] Move bench_offline_throughput into sglang/benchmark/ with a back-compat shim (#28747)
|
2026-06-23 18:37:52 -07:00 |
|
 karverma-amdandsogalin_codegen
|
20b2817bdf
|
[AMD] Enable BCG on ROCm + route aiter prefill via MHA during PCG/BCG capture for Kimi-2.5 (#27833)
Co-authored-by: sogalin_codegen <39478626+sogalin@users.noreply.github.com>
|
2026-06-23 18:22:41 -07:00 |
|
 Polisetty V R K Jyothendra VarmaandMa Mingfei
|
5338e44483
|
[Intel GPU] fix triton-mla attention on XPU by limiting max_kv_splits to 8 which is default (#28646)
Signed-off-by: P V R K Jyothendra Varma <polisetty.v.r.k.jyothendra.varma@intel.com>
Co-authored-by: Ma Mingfei <mingfei.ma@intel.com>
|
2026-06-24 09:06:13 +08:00 |
|
 Raiden MakotoandRaiden-Makoto
|
7454735be9
|
[AMD] [GLM5] Add opt-in Triton fp8 sparse-MLA prefill kernel for gfx950 (#28975)
Co-authored-by: Raiden-Makoto <Raiden-Makoto@users.noreply.github.com>
|
2026-06-23 18:04:07 -07:00 |
|
 Raiden MakotoandRaiden-Makoto
|
5e6d7c1615
|
[AMD] Fix DeepSeek-V4 fp8 KV path on gfx942 (e4m3fnuz) (#28455)
Co-authored-by: Raiden-Makoto <Raiden-Makoto@users.noreply.github.com>
|
2026-06-23 17:45:13 -07:00 |
|
    
|
b2c8f7a22e
|
[AMD] Support triton backend decode context parallel for Qwen3.5 (#25090)
Co-authored-by: Baizhou Zhang <sobereddiezhang@gmail.com>
Co-authored-by: Kangyan-Zhou <zky314343421@gmail.com>
Co-authored-by: Khoa Pham <khoa.pham@radixark.ai>
Co-authored-by: Hubert Lu <55214931+hubertlu-tw@users.noreply.github.com>
Co-authored-by: zhengyao <zayao@amd.com>
|
2026-06-23 17:35:56 -07:00 |
|
Liangsheng Yin
|
9ef1830701
|
[Scheduler] Extract DFlash prefill refill into a standalone MinFreeSlotsDelayer (#29089)
|
2026-06-23 17:04:55 -07:00 |
|
Jackey Hua
|
f444b5897b
|
[Spec][1/N] Decoupled speculative decoding: IPC protocol + cross-process request id + server flags (#27634)
|
2026-06-23 17:04:45 -07:00 |
|
Lianmin Zheng
|
34dd9c28ca
|
[Refactor] Introduce sock_send/sock_recv wrappers for zmq IPC (#29012)
|
2026-06-23 15:54:36 -07:00 |
|
Lianmin Zheng
|
ecab3f322e
|
Revert "Improve MFU metrics for prefill and verify timing" (#29079)
|
2026-06-23 15:46:22 -07:00 |
|
Liangsheng Yin
|
11e7c9e0e6
|
[misc] Add sglang.bench_one_batch deprecation shim (#29082)
|
2026-06-23 14:57:35 -07:00 |
|
Trevor Morris
|
f74a1722e6
|
[NVIDIA] Support TF32 matmul to improve MiniMax gate gemm performance (#22744)
|
2026-06-23 14:54:54 -07:00 |
|
Liangsheng Yin
|
c864c8d9c2
|
[misc] Move bench_one_batch into sglang/benchmark/ with a back-compat shim (#28687)
|
2026-06-23 14:48:35 -07:00 |
|
Liangsheng Yin
|
6c5f466023
|
[server_args] Reland FA4 page_size auto-force for combined --attention-backend fa4 (#28976)
|
2026-06-23 14:21:59 -07:00 |
|
YAMY
|
93015a9e6b
|
fix(runner): autotune flashinfer MoE on a decode-shaped buffer (#29069)
|
2026-06-23 13:31:47 -07:00 |
|
Jan Bernlöhr
|
fc27ce0666
|
Add GB10 FP8 fused MoE Triton config (#25665)
|
2026-06-23 13:30:51 -07:00 |
|
Mohammad Miadh Angkad
|
cedb43d522
|
[DeepEP] Gate DeepEP MNNVL on fabric support (#28942)
|
2026-06-23 13:19:47 -07:00 |
|
 Lianmin ZhengandPranjal Shankhdhar
|
b60185c41c
|
Improve MFU metrics for prefill and verify timing (#29000)
Co-authored-by: Pranjal Shankhdhar <pranjal.ssh@gmail.com>
|
2026-06-23 12:26:56 -07:00 |
|
Xinyuan Tong
|
0c6e8e9477
|
Expand parser auto detection coverage (#28449)
|
2026-06-23 12:26:37 -07:00 |
|
 karverma-amdandCursor
|
e0dc8b7137
|
[AMD] Fuse topk padded-token masking into a single Triton kernel (#28084)
Co-authored-by: Cursor <cursoragent@cursor.com>
|
2026-06-23 11:15:12 -07:00 |
|
 
|
ed26a109ee
|
[Fix] Return streaming logprobs when reasoning/tool parser is active (#28601)
Co-authored-by: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
Co-authored-by: Xinyuan Tong <115166877+JustinTong0323@users.noreply.github.com>
|
2026-06-23 09:56:09 -07:00 |
|
Xiaoyu Zhang
|
31d71c47af
|
[Diffusion] Fix SANA VAE dtype and TurboWan backend selection (#28769)
|
2026-06-23 22:57:08 +08:00 |
|
 Thomasandronnie_zheng
|
12b08e620b
|
[Diffusion] [NPU] enable Helios on npu (#29011)
Co-authored-by: ronnie_zheng <zl19940307@163.com>
|
2026-06-23 17:25:10 +03:00 |
|
Thomas
|
c67d338637
|
[Diffusion] enable cache-dit for ERNIE-Image model (#28266)
|
2026-06-23 16:08:03 +03:00 |
|
Liangsheng Yin
|
ed0a62e4dd
|
[Mem] Add KV-page double-free checks to the invariant checker (#27731)
|
2026-06-23 02:29:40 -07:00 |
|
 kkandwunhuang
|
af9027f6c9
|
[AMD] Improve performance of dsv4 in high concurrency (#28938)
Co-authored-by: wunhuang <wunhuang@amd.com>
|
2026-06-23 02:20:48 -07:00 |
|