 Yuan Luoandluoyuan.luo
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050f108c29
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Optimize Bailing-MoE with FlashInfer Fused All-Reduce (#15526)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
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2025-12-20 17:34:04 -08:00 |
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Yuan Luoandluoyuan.luo
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019517a356
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[VLM] Support ViT Piecewise CUDA Graph for Qwen3-VL (#15320)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
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2025-12-20 21:00:07 +08:00 |
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Yuan Luoandluoyuan.luo
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165f5c04cb
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Optimize MiMo-V2-Flash by flashinfer fused allreduce (#15464)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
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2025-12-20 17:45:18 +08:00 |
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Yuan Luoandluoyuan.luo
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8fa3dc36c5
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[VLM] Support cos sin cache for Qwen3-VL & GLM-4.1V (#15205)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
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2025-12-18 08:39:50 +08:00 |
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Yuan Luoandluoyuan.luo
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3912ee4991
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[VLM] feat: support chunked vit attention (#14907)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
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2025-12-15 12:11:02 +08:00 |
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3b8a824b8b
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[VLM] Support VLM ViT Piecewise CUDA Graph (#14422)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
Co-authored-by: kousakawang <wanghanpei@bytedance.com>
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2025-12-13 20:49:40 +08:00 |
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Yuan Luoandluoyuan.luo
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03836d85d2
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[GLM-4.6V] Support Pipeline Parallelism for GLM-4.6V & GLM-4.1V (#14720)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
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2025-12-10 16:40:12 +08:00 |
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Yuan Luoandluoyuan.luo
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26d95008b6
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[apply][2/2] Fused qk_norm_rope for Qwen3-MoE (#13998)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
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2025-12-07 20:25:18 +08:00 |
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Yuan Luoandluoyuan.luo
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b2b09f5f24
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[VLM] Introduce Cache for positional embedding ids for Qwen-VL family (#14292)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
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2025-12-04 12:32:00 +08:00 |
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Yuan Luoandluoyuan.luo
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21ec99beff
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[VLM][Doc] Document for VLM DP Encoder (#14279)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
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2025-12-02 15:08:37 +08:00 |
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Yuan Luoandluoyuan.luo
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26aebf83d3
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[VLM] Support Piecewise CUDA Graph for Qwen3-Omni-MOE (#14222)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
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2025-12-02 10:12:10 +08:00 |
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Yuan Luoandluoyuan.luo
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630a693081
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[VLM] Boost Memory Pool based CUDA IPC (#14123)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
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2025-12-01 17:17:46 +08:00 |
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Yuan Luoandluoyuan.luo
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e12c78aab6
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[sgl-kernel][1/2] Fused qk_norm_rope for Qwen3-MoE (#14036)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
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2025-11-28 12:25:15 +08:00 |
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Yuan Luoandluoyuan.luo
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ca5c8b16f6
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[VLM] Support InternVL Vision Encoder Data Parallelism (#13925)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
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2025-11-26 11:43:05 +08:00 |
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Yuan Luoandluoyuan.luo
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8ef11569a2
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[VLM] Revise InternVL Piecewise CUDA Graph Supporting (#13846)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
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2025-11-24 22:15:10 +08:00 |
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f56b9b42e6
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[Bugfix] Add jit kernel files in packaging (#13829)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
Co-authored-by: Xu Yongfei <xuyongfei.xyf@antgroup.com>
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2025-11-24 12:32:16 +08:00 |
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Yuan Luoandluoyuan.luo
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5625e32cae
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[VLM] Replace torch.repeat_interleave with faster np.repeat for Qwen-VL series (#13736)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
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2025-11-22 22:45:32 +08:00 |
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Yuan Luoandluoyuan.luo
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475962a139
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[VLM] Support Piecewise CUDA Graph for InternVL (#13640)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
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2025-11-21 13:21:51 +08:00 |
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af6bcadcf7
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[VLM] Support Piecewise CUDA Graph for Qwen2.5-VL (#13055)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
Co-authored-by: Yuhao Yang <yhyang201@gmail.com>
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2025-11-20 10:23:44 +08:00 |
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Yuan Luoandluoyuan.luo
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f0021c0dc8
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Add feature flag for mm inputs processing optimization (#13278)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
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2025-11-15 14:43:44 +08:00 |
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706502ff6c
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[VLM] Support PP for Qwen2.5-VL (#13075)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
Co-authored-by: Tianyu Guo <guoty9@mail2.sysu.edu.cn>
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2025-11-12 23:18:44 +08:00 |
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fd3034da75
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[VLM] Optimize qwen_vl preprocess_video (#12240)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
Co-authored-by: 羽癫 <yudian.zy@antgroup.com>
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2025-11-06 14:55:01 +08:00 |
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Yuan Luoandluoyuan.luo
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bb517fe393
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[HotFix] Disable torch dynamo for mrope_triton kernel (#12593)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
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2025-11-04 23:26:56 +08:00 |
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Yuan Luoandluoyuan.luo
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819fc59123
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Add prefix for torch symm mem (#12506)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
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2025-11-02 11:23:05 -08:00 |
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Yuan Luoandluoyuan.luo
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c30ebb9300
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[VLM] Optimize async mm data process mechanism (#12066)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
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2025-11-01 01:24:53 +08:00 |
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Yuan Luoandluoyuan.luo
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17a57fd862
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[Perf] Optimize multimodal mm_inputs process in scheduler (#11910)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
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2025-10-30 10:48:10 +08:00 |
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813bd6f85c
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[2/2] Use moe_sum_reduce cuda kernel (#10654)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
Co-authored-by: huangtingwei <141888744+huangtingwei9988@users.noreply.github.com>
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2025-10-28 12:01:57 +08:00 |
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Yuan Luoandluoyuan.luo
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f389f01714
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Optimize triton_mrope with torch compile (#12112)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
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2025-10-27 23:49:22 +08:00 |
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Yuan Luoandluoyuan.luo
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7ef5d8afd4
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Revise POINTSV15Chat model (#12049)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
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2025-10-24 17:09:45 +08:00 |
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74de76c685
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Revise MRotaryEmbedding's forward (#11859)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
Co-authored-by: 羽癫 <yudian.zy@antgroup.com>
Co-authored-by: b8zhong <b8zhong@uwaterloo.ca>
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2025-10-21 10:38:29 +08:00 |
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271d3d0d50
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Support mrope triton kernel and add unit test (#11722)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
Co-authored-by: b8zhong <b8zhong@uwaterloo.ca>
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2025-10-20 11:51:07 +08:00 |
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Yuan Luoandluoyuan.luo
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0b6f535f66
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[Reland] perf: optimize qwen-vl with symm mem allreduce (#11457)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
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2025-10-13 17:51:25 +08:00 |
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Yuan Luoandluoyuan.luo
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3b9d97f335
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perf: optimize qwen-vl with symm mem allreduce (#11381)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
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2025-10-10 22:24:45 +08:00 |
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Yuan Luoandluoyuan.luo
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b5044fbf12
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Replace pad with cat for better performance (#11388)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
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2025-10-10 12:03:17 +08:00 |
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Yuan Luoandluoyuan.luo
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4f42c8cd3e
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[sgl-kernel] Support float64 moe_sum_reduce cuda kernel (#11068)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
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2025-10-07 14:31:11 +00:00 |
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Yuan Luoandluoyuan.luo
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590f2da052
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[Feat] Support Torch Symm Mem AllReduce (#10571)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
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2025-10-05 13:55:19 -07:00 |
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42245551ef
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[sgl-kernel] Optimize concat_mla_k kernel (#10543)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
Co-authored-by: PGFLMG <1106310035@qq.com>
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2025-09-28 23:04:22 +08:00 |
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Yuan Luoandluoyuan.luo
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a5095d6262
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Fuse write kv buffer into rope for qwen3 moe & bailing moe (#10749)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
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2025-09-26 15:18:41 +08:00 |
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616a3e20df
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[sgl-kernel] Support moe_sum_reduce cuda kernel (#10321)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
Co-authored-by: Xiaoyu Zhang <35585791+BBuf@users.noreply.github.com>
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2025-09-19 14:12:09 +08:00 |
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24dc2bee97
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Fix Bailing MoE model bugs (#10362)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
Co-authored-by: 羽癫 <yudian.zy@antgroup.com>
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2025-09-12 00:36:02 -07:00 |
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cb3918a091
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Optimize moe_sum_reduce_kernel (#9477)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
Co-authored-by: Xiaoyu Zhang <35585791+BBuf@users.noreply.github.com>
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2025-09-07 09:16:18 +08:00 |
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Yuan Luoandluoyuan.luo
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ec15c8360e
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Optimize Qwen3-moe model by using flashinfer fused allreduce (#9973)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
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2025-09-04 20:48:53 +08:00 |
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Yuan Luoandluoyuan.luo
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968e181826
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Fix triton_fused_moe unit test and benchmark (#9276)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
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2025-08-18 00:54:33 -07:00 |
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Yuan Luoandluoyuan.luo
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53dcc750b6
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[sgl-kernel] Support FlashInfer top_k_top_p_sampling_from_logits (#9060)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
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2025-08-14 10:56:36 -07:00 |
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Yuan Luoandluoyuan.luo
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432f2053dd
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[sgl-kernel] 1/N Refactor sglang cutlass 3x - gemm fp8 blockwise sm90 (#8913)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
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2025-08-14 10:55:54 -07:00 |
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Yuan Luo
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1bd5316873
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fix benchmark fp8 blockwise group gemm (#8815)
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2025-08-06 21:02:21 +08:00 |
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Yuan Luoandluoyuan.luo
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3b87a9e8ae
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Fix bug of refactoring TopKOutput in w4afp8 (#8745)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
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2025-08-03 20:05:02 -07:00 |
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3bdcdd134b
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[Hot-Fix] moe_aligned_block_size CI failed in AMD (#8461)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
Co-authored-by: Xiaoyu Zhang <35585791+BBuf@users.noreply.github.com>
Co-authored-by: JieXin Liang <Alcanderian@users.noreply.github.com>
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2025-07-31 00:28:32 +08:00 |
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b3eac168e7
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Support triton kernels v3.4.0 for fused_moe (#8258)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
Co-authored-by: Cheng Wan <cwan@x.ai>
Co-authored-by: Cheng Wan <54331508+ch-wan@users.noreply.github.com>
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2025-07-27 02:28:49 -07:00 |
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Yuan Luoandluoyuan.luo
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0c8dab9e67
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[sgl-kernel] Opt per_token_quant_fp8 with warp reduce (#8130)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
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2025-07-23 21:22:59 +08:00 |
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Yuan Luo
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af1cc8fe2d
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[kernel] opt moe align block kernel by block/warp scan algorithm (#7884)
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2025-07-17 19:33:02 +08:00 |
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Yuan Luoandluoyuan.luo
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253454de9b
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Integrate triton moe kernel (#7689)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
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2025-07-06 20:05:49 -07:00 |
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Yuan Luoandluoyuan.luo
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84727a5139
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[sgl-kernel] Add cuda kernel for moe_ep_silu_and_mul (#6919)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
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2025-06-11 20:43:08 -07:00 |
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Yuan Luoandluoyuan.luo
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43baba649e
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[EP] Add cuda kernel for moe_ep_post_reorder (#6837)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
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2025-06-05 00:33:47 -07:00 |
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Yuan Luoandluoyuan.luo
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55444ed667
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[EP] Add cuda kernel for moe_ep_pre_reorder (#6699)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
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2025-06-01 20:49:01 -07:00 |
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Yuan Luoandluoyuan.luo
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c087ddd686
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Refine pre_reorder_triton_kernel slightly to improve performance (#6627)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
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2025-05-28 00:15:23 -07:00 |
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Yuan Luoandluoyuan.luo
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121f92c583
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Add main for merge state tests (#6492)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
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2025-05-21 21:56:25 -07:00 |
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Yuan Luoandluoyuan.luo
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30ca18f423
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Refactor group_concurrent_contiguous in NIXL (#6214)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
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2025-05-21 11:55:04 +08:00 |
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Yuan Luoandluoyuan.luo
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67b7d5b1df
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[PD] Vectorise group_concurrent_contiguous in NumPy (#5834)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
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2025-05-01 22:42:37 +08:00 |
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Yuan Luoandluoyuan.luo
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d06a83fb01
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Support dynamic connection and TP 16 (#5351)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
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2025-04-15 17:08:07 +08:00 |
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