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4349538c02
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[model] add cosmos3 reasoner to llm only inference (#33572)
Signed-off-by: joeltg <joel@reflection.ai>
Signed-off-by: Joe Rowell <joe@poolside.ai>
Co-authored-by: Dawid Majchrowski <dmajchrowski@nvidia.com>
Co-authored-by: Kedi Wu <kediw@nvidia.com>
Co-authored-by: Kedi Wu <31940276+kediwu0331@users.noreply.github.com>
Co-authored-by: Joel Gustafson <joelgustafson@protonmail.com>
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2026-09-04 22:11:58 +08:00 |
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Shuwen Wang
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19b46863f3
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fix: align write-through pending across tree cores (#37278)
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2026-09-04 22:08:25 +08:00 |
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Mick
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88021b0734
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[diffusion] chore: make nightly performance measurements robust (#37915)
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2026-09-04 22:03:25 +08:00 |
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Lianmin Zheng
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978cc228ca
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[Rust] Bound multimodal media ingress (#37967)
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2026-09-04 05:22:44 -07:00 |
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Shuwen WangandClaude Opus 5
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e4adf63275
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[Fix] Vacuous marker writes in the cache tests, and an undebited Mamba admission slot (#36415)
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
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2026-09-04 19:43:17 +08:00 |
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Kevin MiandClaude Fable 5.1
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3b678549c3
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[diffusion] chore: warm up minimax-h3 at the served clip shape (#37945)
Co-authored-by: Claude Fable 5.1 <noreply@anthropic.com>
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2026-09-04 19:18:02 +08:00 |
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Xiaoyu Zhang
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f3b2725609
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sm120 32GB mem-tier: raise decode cuda-graph max_bs 24->48 + chunked_prefill 2k->4k (#37898)
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2026-09-04 18:47:26 +08:00 |
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12735c2d76
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[mm] refactor mm code for rust tokenizer manager (#34660)
Co-authored-by: Rain Jiang <rain-jiang@outlook.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
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2026-09-04 03:03:25 -07:00 |
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CSWYF3634076androot
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b42569a0f1
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[Quant][ue8m0 fix] group requant_weight_ue8m0 reduce reserved gpu memory (#31755)
Co-authored-by: root <root@johor-edge-gpu-a17-13.bec-host.baidu.com>
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2026-09-04 10:03:21 +00:00 |
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Lianmin ZhengandShiyan Deng
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d7f235daca
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[Memory] Retire graph borrow pool before updating static runs (#37966)
Co-authored-by: Shiyan Deng <dsy842974287@meta.com>
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2026-09-04 02:59:52 -07:00 |
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44c786679f
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[sp] Make attention-TP sequence sharding a per-forward batch property (#37546)
Co-authored-by: Claude <noreply@anthropic.com>
Co-authored-by: Lianmin Zheng <lianminzheng@gmail.com>
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2026-09-04 02:11:03 -07:00 |
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67248e04b4
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[mem_cache] Route hybrid SWA full-side kv-row frees through free_segment (#37876)
Co-authored-by: weireweire <20922698+weireweire@users.noreply.github.com>
Co-authored-by: Sam Shleifer <sshleifer@gmail.com>
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2026-09-04 01:48:33 -07:00 |
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karverma-amdandwunhuang
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dae126d510
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[AMD][DSv4] Fuse inverse-RoPE into the fp8 wo_a quant (stacked on #37423) (#37658)
Co-authored-by: wunhuang <wunhuang@amd.com>
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2026-09-04 00:51:29 -07:00 |
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Ke Baoandadityakamat24
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0b57847ebf
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Fix mamba radix cache ssm state indexing (#37836)
Co-authored-by: adityakamat24 <adityakamat007@gmail.com>
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2026-09-04 15:46:33 +08:00 |
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Xiaoyu Zhang
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01e66a62db
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[Diffusion] Improve BCG warmup frame-count diagnostics for video models (#37890)
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2026-09-04 15:05:24 +08:00 |
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AMD-yanfeiwangandkk
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7f89cc5286
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[AMD] Skip unused TOPK v2 plan kernel on ROCm (#37580)
Co-authored-by: kk <43161300+kkHuang-amd@users.noreply.github.com>
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2026-09-04 00:00:38 -07:00 |
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1bda9694b7
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[AMD][DSv4] Switch output projection gemm (oproj_a) to fp8 (#37423)
Signed-off-by: Hemanth Acharya <heachary@amd.com>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
Co-authored-by: kk <43161300+kkHuang-amd@users.noreply.github.com>
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2026-09-03 23:56:07 -07:00 |
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Polisetty V R K Jyothendra Varma
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b168f905c8
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[Intel GPU] Align XPU toml file for rust support (#31031)
Signed-off-by: P V R K Jyothendra Varma <polisetty.v.r.k.jyothendra.varma@intel.com>
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2026-09-04 14:48:30 +08:00 |
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Hemanth Acharya
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31ebd8f437
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[AMD][DSv4] Fuse the DSv4 FP4 indexer prefill-schedule preamble into one kernel (#37764)
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2026-09-03 23:44:49 -07:00 |
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Xiaoyu Zhang
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54c2c99feb
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[Diffusion] Fuse LingBot per-token gated residual and RMSNorm modulate (#37910)
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2026-09-04 14:35:13 +08:00 |
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Yu-Yun ChangandHAI
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cb32dbc9e0
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[AMD] [Kimi-K3] Fuse the KDA input projection into a single GEMM on ROCm (#35176)
Co-authored-by: HAI <hixiao@gmail.com>
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2026-09-03 23:30:08 -07:00 |
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72078cd7f5
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[XPU] Support GPT-OSS MXFP4 checkpoints on Intel XPU (#35751)
Co-authored-by: Meng, Hengyu <hengyu.meng@intel.com>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
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2026-09-04 14:20:28 +08:00 |
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Po-Han Huang (NVIDIA)andkpham-sgl
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d122ca99b2
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[Bugfix] Fix Llama 4 FA3 local attention with paged KV cache (#32902)
Co-authored-by: kpham-sgl <khoa.pham@radixark.ai>
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2026-09-03 23:15:23 -07:00 |
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mqhc2020andBingxu Chen
|
4e756ecc4a
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[AMD] CI: fix Lean decode crash on the EAGLE path (#37119)
Co-authored-by: Bingxu Chen <bingxche@amd.com>
|
2026-09-03 23:04:21 -07:00 |
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AMD-yanfeiwangandkk
|
7825e5ffca
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[AMD] Fix DSV4 unified attention sink TP slice (#35092)
Co-authored-by: kk <43161300+kkHuang-amd@users.noreply.github.com>
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2026-09-03 22:59:53 -07:00 |
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Alex NailsandClaude Opus 5
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ebae8ee21e
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[Fix] Register triton.runtime.cache.triton_key in the MPS stub so torch.compile keeps working (#37937)
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
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2026-09-03 22:56:14 -07:00 |
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Xiaoyu Zhang
|
06b8749803
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[Diffusion][Docs] Add single-GPU large-VRAM performance notes (B300) (#37891)
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2026-09-04 13:33:28 +08:00 |
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Mick
|
ed67b73081
|
[diffusion] UX: reduce hot-path server log noise (#37804)
|
2026-09-04 13:31:00 +08:00 |
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Mohammad Miadh AngkadandMohammad Angkad
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ca7b8efd87
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[CI] Fix handle_platform_cp_compatibility reading legacy CP flags off the record (#37930)
Co-authored-by: Mohammad Angkad <mohammad.angkad@radixark.ai>
|
2026-09-03 22:07:04 -07:00 |
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f478b2bb2d
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Fix: abort handling for dispatched requests after client disconnect (#35255)
Signed-off-by: Shijin Zhang <75300765+Dovis01@users.noreply.github.com>
Co-authored-by: Xinyuan Tong <xinyuantong.cs@gmail.com>
Co-authored-by: cctry <cctry@fb.com>
|
2026-09-03 21:51:57 -07:00 |
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ashwini rathi
|
e787de5478
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[XPU][CI] Move XPU tests to nightly and add per-subclass server launch timeout (#37532)
|
2026-09-04 12:51:26 +08:00 |
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Mohammad Miadh Angkad
|
3ad3f23ed5
|
[Comm] Drop the in-tree MNNVL CuTe DSL port in favor of FlashInfer 0.6.18 (#37206)
|
2026-09-03 21:49:48 -07:00 |
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Mick
|
97d081ac76
|
[diffusion] chore: remove unreachable cosmos3 transfer encoding (#37805)
|
2026-09-04 12:14:03 +08:00 |
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Baizhou Zhang
|
ff1285cc28
|
[CP V1 Deprecation 2/5] Make strategy prefill CP canonical (#36223)
|
2026-09-03 20:24:19 -07:00 |
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Mohammad Miadh AngkadandMohammad Angkad
|
c1b4d535d7
|
[CI] Fix lint (#37895)
Co-authored-by: Mohammad Angkad <mohammad.angkad@radixark.ai>
|
2026-09-03 18:37:50 -07:00 |
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|
Aleksi Vesanto
|
5e81d462c3
|
[diffusion] fix: only use fused qk_norm on nvidia gpu (#33994)
|
2026-09-04 09:25:08 +08:00 |
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Li Jinliang
|
6c63d678d5
|
[diffusion] webui: fix minimax h3 webui inference settings (#36320)
|
2026-09-04 09:24:14 +08:00 |
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Kedi WuandKedi Wu
|
94eb15eb6c
|
[diffusion] quant: support fp8 mixed precision for cosmos3 (#36380)
Co-authored-by: Kedi Wu <kediw@nvidia.com>
|
2026-09-04 09:23:38 +08:00 |
|
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Mick
|
2a0602c7ac
|
[diffusion] optimization: unfused w2 bias on SM12.x (cuBLAS 16x16 kernel mis-dispatch) for minimax-h3 vae decoder: (#37835)
|
2026-09-04 09:17:23 +08:00 |
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Mick
|
795dd7abce
|
[diffusion] feat: compose third-party component bundles safely (#37816)
|
2026-09-04 09:15:05 +08:00 |
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heziiop
|
9ed2721c6d
|
[NPU] fix extend_seq_lens_cpu shape in eager mode (#36843)
|
2026-09-04 09:03:30 +08:00 |
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Liangsheng Yin
|
6147a54ddf
|
[PD] Bound transfer engine init with SGLANG_DISAGGREGATION_ENGINE_INIT_TIMEOUT (#37874)
|
2026-09-03 17:16:55 -07:00 |
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Yueming Yuan
|
66d60433c1
|
state_capturer: pin the exact host-cache size via mmap + cudaHostRegister (#37285)
|
2026-09-03 16:20:59 -07:00 |
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Zhiqiang Xie
|
b44496389c
|
[HiCache] Count hit allocations and in-flight backups in the buffer pipeline idle check (#37883)
|
2026-09-03 16:08:50 -07:00 |
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Zhiqiang Xie
|
a480f388b2
|
[HiCache] L3 storage prefetch lifecycle metrics and cross-tier attribution fixes (#37503)
|
2026-09-03 16:00:04 -07:00 |
|
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Yonghao Zhuangandyhzhuang
|
4dc9cda5f9
|
[PD] Gate deferred decode KV release on backend capability (#37454)
Co-authored-by: yhzhuang <yhzhuang@fb.com>
|
2026-09-03 15:42:21 -07:00 |
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Mohammad Miadh Angkad
|
4372b8efa7
|
[1/N] Quantization Refactor: remove dead code and dedup the FP4 marlin helpers (#37552)
|
2026-09-03 14:22:31 -07:00 |
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Lianmin Zheng
|
05dbe64dff
|
Fix buffer-mode idle tracking and VLM memory sizing (#37567)
|
2026-09-03 13:56:12 -07:00 |
|
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Liangsheng Yin
|
2a980cbf10
|
[mem_cache] Require page-aligned starts in free_segment and drop the boundary trim (#37729)
|
2026-09-03 13:28:33 -07:00 |
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|
Zhiqiang Xie
|
d0c95f6c91
|
[HiCache] buffer mode: anchor-lock staged prefetches by default (#37464)
|
2026-09-03 12:08:22 -07:00 |
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