 Qiaolin Yu
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421179c453
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[perf] avoid hidden states d2h when return_hidden_states=false (#25155)
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2026-05-13 23:47:17 -07:00 |
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AndyLi429
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3640116397
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[NPU]Bugfix:Set default values for npu_wrapper_preprocess parameters (#25130)
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2026-05-14 14:21:11 +08:00 |
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be156d6804
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[HiCache] enable ssd offload support for mooncake store (#24277)
Co-authored-by: copilot-swe-agent[bot] <198982749+Copilot@users.noreply.github.com>
Co-authored-by: stmatengss <11641725+stmatengss@users.noreply.github.com>
Co-authored-by: Zhangheng <hzh0425@apache.org>
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2026-05-13 23:07:02 -07:00 |
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Ke Bao
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e4378ff37f
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[UnifiedRadixCache] Fix HiCache load back start node (#25088)
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2026-05-14 13:18:12 +08:00 |
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Tejas Dharamsi
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c016246b0f
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[Rerank] Early-exit logprob scan and hoist math import (#25046)
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2026-05-13 22:01:07 -07:00 |
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Piotr MazurekandPiotr Mazurek
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a6a6c3119b
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LFM2: pass has_initial_state to causal_conv1d_fn for prefill (#24717)
Co-authored-by: Piotr Mazurek <piotr.mazurek@liquid.ai>
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2026-05-13 21:57:58 -07:00 |
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Liangsheng Yin
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5c11c2492f
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ci: emit machine-readable TIMINGS block at end of run_unittest_files (#25232)
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2026-05-13 21:56:54 -07:00 |
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Pai Liu
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fd889097dc
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[Bug Fix] Add priority property to DecodeRequest to fix AttributeError with --enable-priority-scheduling (#25064)
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2026-05-14 11:54:25 +08:00 |
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c701a08765
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feat: [2/2][DeepEP] Add waterfill load balancing for shared expert dispatch (#19290)
Co-authored-by: Sisyphus <clio-agent@sisyphuslabs.ai>
Co-authored-by: root <aichenf@nvidia.com>
Co-authored-by: Cheng Wan <54331508+ch-wan@users.noreply.github.com>
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2026-05-13 19:23:41 -07:00 |
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Lianmin Zhengandcctry
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5fb6bde6c0
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Add sglang:get_loads_duration_seconds metric (#25163)
Co-authored-by: cctry <cctry@meta.com>
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2026-05-13 18:38:49 -07:00 |
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Baizhou Zhangandpranjalssh
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b7f856df70
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DeepSeek V4 w4a4 MegaMoE (#25052)
Co-authored-by: pranjalssh <adkz.photos@gmail.com>
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2026-05-13 18:35:32 -07:00 |
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34c0029f0a
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[diffusion] [AMD] feat: support online MXFP4 and fp8 quantization (#21431)
Co-authored-by: Bowen Bao <bowenbao@amd.com>
Co-authored-by: HAI <hixiao@gmail.com>
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2026-05-14 08:52:01 +08:00 |
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Qiaolin Yu
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7618ad7075
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[attn backend] Integrate tokenspeed_mla prefill/decode kernels (fp8 kv cache, blackwell) (#24925)
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2026-05-13 17:36:17 -07:00 |
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Liangsheng Yin
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22d3f3996c
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ci: decouple stage and runner for cuda registry (#25197)
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2026-05-13 17:28:21 -07:00 |
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Cheng WanandClaude Opus 4.7
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6c0633b0b1
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fix(nvfp4): make process_weights_after_loading hot-reload-safe via alias-when-same-shape (#25190)
Co-authored-by: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
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2026-05-13 16:57:39 -07:00 |
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shiyu7
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37f18438c5
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[rebase]Deepseek_v4 support w4(mxfp4)a16 on hopper (#24986)
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2026-05-13 16:33:46 -07:00 |
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Khoa PhamandClaude Opus 4.7
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371cb2ade2
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[Bench] Add MEM profile activity to bench_serving (#25026)
Co-authored-by: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
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2026-05-13 16:22:11 -07:00 |
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ziang663
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8438709e9c
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Fix scheduler admission for near-full KV requests (#25126)
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2026-05-13 15:30:49 -07:00 |
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Liangsheng Yin
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f9ff5fc154
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multi_layer_eagle: add tracing hooks (#24858)
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2026-05-13 15:29:38 -07:00 |
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sglang-botandClaude Opus 4.7
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0a2615df24
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chore: add vLLM SPDX copyright headers to ported files (#25182)
Co-authored-by: Claude Opus 4.7 <noreply@anthropic.com>
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2026-05-13 15:17:30 -07:00 |
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Yanbin Jiangandgh1595
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01a225ac6f
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[LoRA] MLA attention LoRA: q_b_proj / kv_b_proj support (#25001)
Co-authored-by: gh1595 <278903827+gh1595@users.noreply.github.com>
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2026-05-13 15:15:30 -07:00 |
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Yuan Luoandluoyuan.luo
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28758d37dd
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Add FlashInfer SM90 cutlass MXFP4 MoE backend (W4A16) for GPT-OSS + DeepSeek-V4 (#24816)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
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2026-05-13 14:53:18 -07:00 |
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shuwennandClaude Opus 4.7
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d6b28b4a69
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[Refactor] Remove dead key_convert_fn / convert_to_bigram_key (#25161)
Co-authored-by: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
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2026-05-13 13:54:36 -07:00 |
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Ata Fatahi
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3178a70577
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[PD Disaggregation] Fix priority scheduling in PD disaggregation mode (#25062)
Signed-off-by: Ata Fatahi <immrata@gmail.com>
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2026-05-13 11:43:21 -07:00 |
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oriandzhiguo.qin
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22012ba1bc
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Add BF16 support to EP-MoE for DeepGEMM (#17392)
Co-authored-by: zhiguo.qin <zhiguo.qin@mthreads.com>
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2026-05-13 11:06:37 -07:00 |
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Le Zhangandlezhang
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6ac30192fa
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[MLX] Add on-the-fly --quantization mlx_q4 / mlx_q8 for Apple Silicon (#24907)
Co-authored-by: lezhang <lezhang@local>
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2026-05-13 11:06:13 -07:00 |
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Mick
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ff70aeac30
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[diffusion] feat: add performance mode server args (#24491)
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2026-05-14 00:57:46 +08:00 |
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e2290b155a
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Port KV Compression V2 from deepseek_v4_dev (#24890)
Co-authored-by: Cheng Wan <chwan@rice.edu>
Co-authored-by: DarkSharpness <2040703891@qq.com>
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2026-05-13 22:40:38 +08:00 |
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d0913fca8d
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Port fused SiLU+clamp+FP8 quant from DSV4 dev branch (#24897)
Co-authored-by: Cheng Wan <chwan@rice.edu>
Co-authored-by: fzyzcjy <ch271828n@outlook.com>
Co-authored-by: zcnrex <zcnrex@gmail.com>
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2026-05-13 22:36:44 +08:00 |
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litangss
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9e00b7ca95
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[NPU] add zbal support for npu (#24575)
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2026-05-13 20:52:42 +08:00 |
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2a4d382b07
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[Disagg][NIXL] Add staging buffer support for heterogeneous TP KV transfer (#22536)
Co-authored-by: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
Co-authored-by: Shangming Cai <csmthu@gmail.com>
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2026-05-13 19:54:02 +08:00 |
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YC Yen-Ching Tseng
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cf92ccbf18
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[AMD] Run jit kernel PR test through run_suite.py register mechanism (#24987)
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2026-05-13 02:57:08 -07:00 |
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Jacob0226
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fc20f5b114
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[AMD] Skip redundant CatArrayBatchedCopy in GLM-5 NSA TileLang decode (#24125)
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2026-05-13 02:55:28 -07:00 |
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Thomas Wang
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a9359707c1
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[AMD] Enable preshuffle paged MQA and page_size=64 for NSA indexer (#23562)
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2026-05-13 02:33:57 -07:00 |
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McZyWu
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9d0be860a4
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[NPU] recover accuracy for gemma3-4b-it from 54% to 72% (reduced by transformer5.3) (#21537)
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2026-05-13 16:46:04 +08:00 |
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d8f7b78a29
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[diffusion] fix: plumb max_sequence_length via diffusers_kwargs (#20930)
Co-authored-by: jiangqc <jqc1569978990@gmail.com>
Co-authored-by: jiangqianchen <jiangqianchen@xiaohongshu.com>
|
2026-05-13 16:32:47 +08:00 |
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Lukas HumbelandClaude Sonnet 4.6
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c32f2dc1ac
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fix(nixl): close file descriptors after each FILE transfer (#24671)
Co-authored-by: Claude Sonnet 4.6 <noreply@anthropic.com>
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2026-05-13 00:34:52 -07:00 |
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Matti Varjokallio
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839f7f2696
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[AMD] Add _skip_rope_for_aiter_fused_mla method and check to avoid double rotating with gfx950 and Aiter backend (#24148)
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2026-05-13 00:27:09 -07:00 |
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Baizhou Zhang
|
51a9403104
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Update flashinfer to 0.6.11.post1 (#25129)
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2026-05-13 00:12:19 -07:00 |
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Cheng WanandClaude Opus 4.7
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f2a90094c9
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bench: fix wrong flag names in bench_one_batch{,_server} docstrings (#25143)
Co-authored-by: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
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2026-05-12 23:46:47 -07:00 |
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billishyahaoandDuyi-Wang
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66a9234246
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[AMD] support fp8 blockwise quantization combine for mori ep (#24879)
Co-authored-by: Duyi-Wang <duyi.wang@amd.com>
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2026-05-12 23:24:40 -07:00 |
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Khoa Pham
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c665edec6e
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[env] Make max KV chunk capacity configurable via SGLANG_MAX_KV_CHUNK_CAPACITY (#25120)
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2026-05-12 22:37:45 -07:00 |
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Liangsheng Yin
|
adae4042a7
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spec: defer verify() idle hidden_size to worker fixup (#25109)
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2026-05-12 22:13:52 -07:00 |
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RulinJuiceandRulinJuice
|
3f048c80b8
|
Reject repetition_penalty=0 in SamplingParams.verify() (#24874)
Co-authored-by: RulinJuice <265952454+RulinJuice@users.noreply.github.com>
|
2026-05-12 21:25:23 -07:00 |
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4e35c30cbe
|
[Bugfix, NSA HiCache] Fix missing override_kv_cache_dim in attach_hybrid_nsa_pool_to_hiradix_cache (#25022)
Co-authored-by: Taegeon Um <taegeon.um@samsung.com>
Co-authored-by: Zhangheng <hzh0425@apache.org>
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2026-05-13 11:45:08 +08:00 |
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shuwenn
|
5ed9a494d0
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[UnifiedTree] fix: allow partial match on evicted+backuped nodes (#24943)
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2026-05-13 11:43:12 +08:00 |
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ZhanghengandJINZ
|
6140e45ef3
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[UnifiedTree]: Fix the leaf determination logic in _cascade_evict. (#25068)
Co-authored-by: JINZ <1023553676@qq.com>
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2026-05-13 10:57:32 +08:00 |
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sky
|
409d350fb6
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Bugfix: fix symm not enabled due to incorrect registration of comm (#19329)
Signed-off-by: wangfakang <fakangwang@gmail.com>
|
2026-05-13 10:01:04 +08:00 |
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chenxu214
|
642ac9c916
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[NPU]pp support mla kv transfer (#23893)
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2026-05-13 09:10:02 +08:00 |
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d6d3d0f599
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Optimize SWA memory preallocation for disaggregated decode (#24857)
Co-authored-by: weireweire <weiliangl@nvidia.com>
Co-authored-by: Cheng Wan <chwan@rice.edu>
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2026-05-13 09:09:34 +08:00 |
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