4 people d0913fca8d Port fused SiLU+clamp+FP8 quant from DSV4 dev branch (#24897) ...

Co-authored-by: Cheng Wan <chwan@rice.edu>
Co-authored-by: fzyzcjy <ch271828n@outlook.com>
Co-authored-by: zcnrex <zcnrex@gmail.com>

2026-05-13 22:36:44 +08:00

..

sglang

Port fused SiLU+clamp+FP8 quant from DSV4 dev branch (#24897)

2026-05-13 22:36:44 +08:00

tools

Fix get_version_tag.py to handle dot-separated post versions (#22385)

2026-04-08 15:18:22 -07:00

pyproject_cpu.toml

feat: use structural tags to enable strict tool calling and reasoning for more models (#21722)

2026-05-04 02:30:28 -07:00

pyproject_npu.toml

feat: use structural tags to enable strict tool calling and reasoning for more models (#21722)

2026-05-04 02:30:28 -07:00

pyproject_other.toml

[MUSA] Use MUSA-optimized operators in piecewise CUDA graph (#23633)

2026-05-11 17:55:27 -07:00

pyproject_xpu.toml

feat: use structural tags to enable strict tool calling and reasoning for more models (#21722)

2026-05-04 02:30:28 -07:00

pyproject.toml

Update flashinfer to 0.6.11.post1 (#25129)

2026-05-13 00:12:19 -07:00