Commit Graph
3256 Commits
Author SHA1 Message Date
hhhh1252023 1b481deade feat: sync npu nightly test improvements from Ascend testcases (#29403) 2026-07-06 22:41:15 +08:00
chengcuipingandMohammad Miadh Angkad e2b55bdbab NUMA: probe numactl binding and fall back when --membind is rejected (#28401)
Co-authored-by: Mohammad Miadh Angkad <176301910+mmangkad@users.noreply.github.com>
2026-07-06 16:03:59 +08:00
Lianmin Zheng 24c42c90be Clean up ServerArgs post-init dispatch (#30186) 2026-07-05 23:05:07 -07:00
Baizhou Zhang 5eb1b6a7ba Remove retired DSA env paths (#29912) 2026-07-05 22:58:02 -07:00
Mohammad Miadh Angkad b1942fc3ea [Model] Support Qwen3.6 ModelOpt mixed NVFP4 (#27906) 2026-07-05 21:31:15 -07:00
ashwini rathiandarathi-hlab 850719ebd9 [XPU] Unbreak stage-b: re-add --disable-decode-cuda-graph, quarantine EAGLE3 parity (#30048)
Co-authored-by: arathi-hlab <arathi.rajanraghavendran@intel.com>
2026-07-06 12:25:46 +08:00
81735ecf80 [AMD ]Feat/dsv4 ep tbo prefill (#29362)
Co-authored-by: wunhuang <wunhuang@amd.com>
Co-authored-by: At1a8 <fangyuan@amd.com>
2026-07-05 21:18:34 -07:00
DarkSharpnessandClaude c016c6f355 [JIT Kernel] DeepSeek-V4 DSA indexer: faster top-k + page-table transform (runtime k <= 2048) (#26788)
Co-authored-by: Claude <noreply@anthropic.com>
2026-07-05 20:23:39 -07:00
Lianmin Zheng 9d00385b63 Cleanup: relocate temp_set_env and consolidate multi-device/CUDA helpers in common.py (#30180) 2026-07-05 18:47:26 -07:00
Cheng WanandClaude Fable 5 602c8615a1 [fix] Reconcile the legacy-getter ratchet baseline after racing merges (#30154)
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
2026-07-05 22:06:07 +08:00
Cheng Wan 8fb99bbaf8 [refactor] Config resolution pipeline: full-stack review (10-PR series, review only) (#30137) 2026-07-05 00:00:07 -07:00
ybyang 63c4996fef fix: populate batch req rids and per-request http_worker_ipc for mult… (#29882) 2026-07-04 12:09:41 -07:00
Baizhou Zhang e552f6ed75 [Fix] Fix DSA indexer fusion for NeoX RoPE (#30111) 2026-07-04 03:20:55 -07:00
Cheng WanandClaude Fable 5 b941e337a4 [refactor] Rename Arg.model_overridable to Arg.resolvable (stack 15/15) (#30077)
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
2026-07-04 02:23:01 -07:00
Cheng WanandClaude Fable 5 7ea2284551 [refactor] Migrate the DeepSeek family and the parallel-request chains (stack 14/15) (#30076)
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
2026-07-04 02:22:50 -07:00
Cheng WanandClaude Fable 5 3836cba9ee [refactor] Migrate the moe_runner_backend / quantization resolution chains (stack 13/15) (#30075)
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
2026-07-04 02:22:38 -07:00
Cheng WanandClaude Fable 5 276fbfe880 [refactor] Migrate the page_size resolution chain (stack 12/15) (#30074)
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
2026-07-04 02:22:28 -07:00
Cheng WanandClaude Fable 5 abbb41a214 [refactor] Migrate the attention_backend resolution chain (stack 11/15) (#30073)
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
2026-07-04 02:22:17 -07:00
Cheng WanandClaude Fable 5 5c95bf15c8 [refactor] Add the post-process resolution stage; migrate sampling_backend (stack 10/15) (#30072)
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
2026-07-04 02:22:05 -07:00
Cheng WanandClaude Fable 5 ae29c5a1dc [refactor] Sweep disable_hybrid_swa_memory writers; close the dtype family (stack 9/15) (#30071)
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
2026-07-04 02:21:54 -07:00
Cheng WanandClaude Fable 5 4bf4db09f6 [refactor] Add predicate-keyed registration; migrate the Step3p family (stack 8/15) (#30070)
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
2026-07-04 02:21:43 -07:00
Cheng WanandClaude Fable 5 8d8f17e28c [refactor] Migrate the first override families: Mistral/Pixtral dtype, MiniMaxM2, MiMoV2 (stack 7/15) (#30069)
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
2026-07-04 02:21:32 -07:00
Cheng WanandClaude Fable 5 df6491d80c [refactor] Wire the config resolution pipeline (dispatch, stash, dual-apply, publish) (stack 6/15) (#30068)
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
2026-07-04 02:21:21 -07:00
Cheng WanandClaude Fable 5 c3d751b231 [refactor] Add the declarative model-override registry and resolution gate (stack 5/15) (#30067)
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
2026-07-04 02:21:09 -07:00
Cheng WanandClaude Fable 5 10f258257f [refactor] Add the resolved-flags tier + resolvable-field metadata (stack 4/15) (#30066)
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
2026-07-04 02:20:58 -07:00
Cheng WanandClaude Fable 5 ff57171f98 [refactor] Soft-deprecate the legacy global ServerArgs accessors + ratchet (stack 3/15) (#30065)
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
2026-07-04 02:20:46 -07:00
Cheng WanandClaude Fable 5 def20782cf [refactor] Move ServerArgs ownership into the runtime context (stack 2/15) (#30064)
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
2026-07-04 02:20:34 -07:00
Cheng WanandClaude Fable 5 6d662c9245 [refactor] Add a read-through server_args accessor to RuntimeContext (stack 1/15) (#30063)
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
2026-07-04 02:19:46 -07:00
Cheng Wan 88db9e033a Adjust KL_THRESHOLD for log probability calculations (#30101) 2026-07-03 23:53:51 -07:00
Pranjal Shankhdharandpranjalssh ad744c6c6b [trtllm_mha] Fuse cuda-graph metadata rebuild into one triton kernel (#29843)
Co-authored-by: pranjalssh <pranjalssh@fb.com>
2026-07-03 22:24:28 -07:00
Baizhou Zhang 1f0f353d92 [CI] Add GLM52 NVFP4 MTP B200 tests (#30021) 2026-07-03 13:43:38 -07:00
0203c60fdf [CP] Consolidate decode-context-parallel (DCP) helpers into layers/dcp/ (#29365)
Co-authored-by: Hao Phan <htphan@nvidia.com>
Co-authored-by: Claude Opus 4.8 <noreply@anthropic.com>
2026-07-03 12:25:39 -07:00
Cao E 9df16b5ba9 [XPU] Remove redundant xpu graph backend and make xpu graph opt-in by default (#29911) 2026-07-03 15:58:56 +08:00
xutizhou d364cd8ead Support DSV4 shared expert fusion for DeepEP and MegaMOE (#27349) 2026-07-02 23:18:25 -07:00
YAMY e81f05cf4f [dsv4] Trigger MHC prenorm prewarm at weight-load time with rank sync (#29988) 2026-07-02 23:05:03 -07:00
YAMY a6ee64d237 [DeepSeek-V4] Add an opt-in non-paged indexer for long-context prefill (#29619) 2026-07-02 22:54:40 -07:00
Yiqi Yang f011d8c2e5 [Anthropic] Fix missing cache_read_input_tokens in streaming responses (#29703) 2026-07-03 12:46:45 +08:00
Xiaoyu ZhangandClaude Opus 4.8 a2d7eb303e [MoE] Consolidate ungrouped + grouped gate/topk onto one Triton router (#26771) — faster than AOT on B200/H100/H200, at parity with flashinfer (#29771)
Co-authored-by: Claude Opus 4.8 <noreply@anthropic.com>
2026-07-03 11:18:59 +08:00
Michael bee0f34e68 [AMD] Accept ROCm tensors in JIT kernel TensorMatcher + register 4 kernel tests (#29822) 2026-07-02 19:29:47 -07:00
Oxana Korzh f3904f0293 [bugfix][AMD] Disable aiter allreduce+RMSNorm fusion under DP attention / EP (#27835) 2026-07-02 15:31:25 -07:00
Mohammad Miadh Angkad cfb9c574d3 Fix UE8M0 scale rounding for DeepGEMM (#29956) 2026-07-02 13:42:17 -07:00
Ke Bao a375e9f3da Fix SWA eviction tombstoning the last leaf (#29860) 2026-07-02 21:42:30 +08:00
Xiaoyu Zhang b276a9acee chore: cleanup garbage code (#29770) 2026-07-02 16:14:01 +08:00
Michael 0ae76117ef [AMD] Register 2 CPU/ROCm-safe tests for AMD 1-GPU PR CI (#29680) 2026-07-02 00:25:32 -07:00
Cao E 926140d789 [XPU] Enable XPU graph support (decode full-graph + prefill tc_piecewise) (#29053) 2026-07-02 13:24:35 +08:00
ANSHUMAN TRIPATHY 4fffc6448b Speculative decoding support on XPU (#23180) 2026-07-02 13:23:24 +08:00
Yuwei An 0543246184 Enable Breakable Cuda Graph as Default (#29458) 2026-07-01 22:04:44 -07:00
YAMYandYuwei An 307094dc7d [DeepSeek V4] Cover both dense and sparse prefill paths in the compress attention unittest (#29885)
Co-authored-by: Yuwei An <ayw.sirius19@gmail.com>
2026-07-01 21:20:12 -07:00
Feng Yao e6f6a353bf pad customized_info for mixed output batches (#29842) 2026-07-02 12:07:58 +08:00
Yuan Luoandluoyuan.luo eb23f9a86b [KDA] Add FlashKDA prefill backend for safe-gate KDA linear attention (#29472)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
2026-07-02 11:37:04 +08:00