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26b15a0825
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[LFM2-MoE] Support Transformers v5 packed MoE expert weights (#29659)
Co-authored-by: Piotr Mazurek <piotr.mazurek@liquid.ai>
Co-authored-by: Changyi Yang <changyiyang2023@gmail.com>
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2026-07-02 17:13:02 +08:00 |
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Xiaoyu Zhang
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b276a9acee
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chore: cleanup garbage code (#29770)
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2026-07-02 16:14:01 +08:00 |
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Michael
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0ae76117ef
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[AMD] Register 2 CPU/ROCm-safe tests for AMD 1-GPU PR CI (#29680)
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2026-07-02 00:25:32 -07:00 |
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zijiexiaandClaude Opus 4.8
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1c75243f5e
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docs: add Qwen3.6-27B-NVFP4 variant to cookbook (#29905)
Co-authored-by: Claude Opus 4.8 <noreply@anthropic.com>
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2026-07-02 00:05:29 -07:00 |
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cctry
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697b400d70
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Share one logits output buffer across prefill/decode/draft cuda-graph runners (#29779)
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2026-07-01 23:30:56 -07:00 |
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Cao E
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926140d789
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[XPU] Enable XPU graph support (decode full-graph + prefill tc_piecewise) (#29053)
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2026-07-02 13:24:35 +08:00 |
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ANSHUMAN TRIPATHY
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4fffc6448b
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Speculative decoding support on XPU (#23180)
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2026-07-02 13:23:24 +08:00 |
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790156c98f
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[Intel GPU] DeepSeek V4 7/N: Support fused_rope_inplace on XPU using triton (#27915)
Signed-off-by: P V R K Jyothendra Varma <polisettyvarma@gmail.com>
Co-authored-by: Rahul Vijayaraghavan <rahul.vijayaraghavan@intel.com>
Co-authored-by: Ma Mingfei <mingfei.ma@intel.com>
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2026-07-02 13:22:20 +08:00 |
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Zaili Wang
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cb06c4e6ce
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[CPU] Fix model failures on Xeon (#29497)
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2026-07-02 13:20:18 +08:00 |
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Zaili WangandMa Mingfei
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aff44d748d
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[CPU] Padding for dim divisibility in TP3/6 cases (#20072)
Co-authored-by: Ma Mingfei <mingfei.ma@intel.com>
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2026-07-02 13:14:39 +08:00 |
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cctry
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80ac11eda3
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Fix capture-mode detection during breakable CUDA graph capture (#29866)
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2026-07-01 22:12:56 -07:00 |
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sushil Dubey
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e88645d65f
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[amd][diffusion] fix: fix causal Conv3D cat/pad fusion crashes for wan2.2 t2v (#29672)
Signed-off-by: Sushil Dubey <sushilghansyam.dubey@amd.com>
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2026-07-02 13:11:30 +08:00 |
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Yuwei An
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0543246184
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Enable Breakable Cuda Graph as Default (#29458)
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2026-07-01 22:04:44 -07:00 |
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d15b79e96e
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[bug6] clear stale mamba cow source on rematch (#29354)
Co-authored-by: Zhangheng <hzh0425@apache.org>
Co-authored-by: Hanming Lu <hanminglu@meta.com>
Co-authored-by: Hanming Lu <69857889+hanming-lu@users.noreply.github.com>
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2026-07-02 13:04:09 +08:00 |
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YAMYandYuwei An
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307094dc7d
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[DeepSeek V4] Cover both dense and sparse prefill paths in the compress attention unittest (#29885)
Co-authored-by: Yuwei An <ayw.sirius19@gmail.com>
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2026-07-01 21:20:12 -07:00 |
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Xinyuan Tong
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9ba4b8f8ba
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sgl-kernel: bump sgl-attn for varlen num_splits OOM fix (#29551)
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2026-07-01 21:13:53 -07:00 |
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Feng Yao
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e6f6a353bf
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pad customized_info for mixed output batches (#29842)
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2026-07-02 12:07:58 +08:00 |
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Jae B.
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4605d4d94b
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[Apple Silicon] [CI] Add model-free unit-test workflow on macos-26 (#29691)
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2026-07-01 21:00:22 -07:00 |
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Yuan Luoandluoyuan.luo
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eb23f9a86b
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[KDA] Add FlashKDA prefill backend for safe-gate KDA linear attention (#29472)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
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2026-07-02 11:37:04 +08:00 |
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6eeb9871e5
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Add Laguna XS.2.1 DFlash support to SGLang (#29446)
Co-authored-by: Jimmy Shong <69131491+Jiminator@users.noreply.github.com>
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
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2026-07-01 20:26:23 -07:00 |
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Estrella-xx
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bac351d617
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[NPU] Fix block_table batch size mismatch in GLM-4.7-Flash DeepEP + MTP without CUDA Graphs (#29829)
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2026-07-02 11:09:01 +08:00 |
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Cheng Wan
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b558cc1abb
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feat(short-conv): shared ShortConvAttnBackend for ZAYA1 CCA + LFM2 short conv (#29867)
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2026-07-01 20:08:00 -07:00 |
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iridiumine
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70df09b833
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Fix MambaPool.clear_slots OOM by replacing expand-based tensor allocation with scalar zeroing (#27923)
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2026-07-02 09:26:55 +08:00 |
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Xinyuan TongandAlison Shao
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0c1a0be3b2
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fix(precision): do not promote failed runs to the comparison baseline (#28190)
Co-authored-by: Alison Shao <54658187+alisonshao@users.noreply.github.com>
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2026-07-01 18:19:15 -07:00 |
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Zhaoyi LiandMichael
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a3f6680874
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[AMD]: docker(rocm) bump Mooncake to latest main + enable multi-protocol (#27730)
Co-authored-by: Michael <13900043+michaelzhang-ai@users.noreply.github.com>
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2026-07-01 17:41:46 -07:00 |
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Xinyuan Tong
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cf7c6ac234
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fix(nightly-precision): pin flashinfer allreduce-fusion backend for TP-partial capture contract (#28925)
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2026-07-01 17:26:19 -07:00 |
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Lianmin Zheng
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1a5977d41b
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[chore] Add no-getattr rule; refine no-dataclasses rule (#29871)
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2026-07-01 15:31:34 -07:00 |
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Lianmin Zheng
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76d828a4e8
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Add pranjalssh to CI_PERMISSIONS.json (#29870)
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2026-07-01 14:52:02 -07:00 |
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Ming Yang
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5ae214f18b
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Extract reusable VMM shareable-handle helpers from register_graph_inputs (#29621)
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2026-07-01 14:02:00 -07:00 |
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YAMYandBaizhou Zhang
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c865347b98
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[DeepSeek V4] Enable FlashMLA sparse prefill by default (#29775)
Co-authored-by: Baizhou Zhang <sobereddiezhang@gmail.com>
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2026-07-01 13:50:05 -07:00 |
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Mohammad Miadh Angkad
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8f0d320d31
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[Spec] Enable FlashInfer autotune for spec draft (#29595)
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2026-07-01 13:36:07 -07:00 |
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Cheng Wanandlch1475369
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4a8e76805c
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feat(mem_cache): unified memory pool for hybrid Mamba / SWA models (#29678)
Co-authored-by: lch1475369 <lch1475369@gmail.com>
|
2026-07-01 13:21:59 -07:00 |
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Michael
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3adfd0f34b
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[AMD] Register 3 unit mem_cache + utils tests for stage-b-test-1-gpu-small-amd (#29782)
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2026-07-01 12:57:48 -07:00 |
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Michael
|
8361561c24
|
[AMD] Fix int8 per-token quant Triton portability + register test for AMD nightly CI (#29694)
|
2026-07-01 12:56:33 -07:00 |
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Baizhou Zhang
|
c312cdd3a7
|
Upgrading tvm-ffi/sgl-deep-gemm/tilelang (#29554)
|
2026-07-01 12:32:18 -07:00 |
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Zhihao Wang
|
779ea4a9b5
|
[RL] fix deepseek v4 MXFP8 flashinfer_trtllm_routed MoE weight update (#28676)
Signed-off-by: zhihaow6 <zhihaow6@illinois.edu>
|
2026-07-01 12:29:08 -07:00 |
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eb75d990f7
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[Bugfix] compressed-tensors WNA16 MoE: don't assume a "Linear" config group (#29761)
Signed-off-by: Joe Rowell <joerowell4@gmail.com>
Co-authored-by: Jiminator <jimmysh341@gmail.com>
Co-authored-by: Jimmy Shong <69131491+Jiminator@users.noreply.github.com>
|
2026-07-01 18:08:09 +00:00 |
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Kangyan-ZhouandClaude Opus 4.8
|
30c9801b39
|
[disagg] Fix KV-event publisher port collision under pure data parallelism (#29211)
Co-authored-by: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
|
2026-07-01 10:57:34 -07:00 |
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Mick
|
03b9278da0
|
[diffusion] CI: tighten multimodal-gen consistency thresholds (#29824)
|
2026-07-02 01:32:51 +08:00 |
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Zhaoyi Liandbingxche
|
9bb7de9258
|
[AMD][DI][CI] 2/N Add DSV4 DP8/EP8 and MTP MI355X 1P1D nightly recipes (#29784)
Co-authored-by: bingxche <bingxche@amd.com>
|
2026-07-01 23:46:48 +08:00 |
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YC Yen-Ching Tseng
|
2a6e5c60fe
|
[AMD] Rebalance stage-c-large-8-gpu-mi35x partitions to fix 60-min timeout (#29726)
|
2026-07-01 08:17:00 -07:00 |
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13dc5f2dc7
|
[HiCache][AMD] Add UMBP tiered DRAM + SSD L3 storage backend with hugepage host allocator (#25377)
Co-authored-by: TianDi101 ditian12@amd.com
Co-authored-by: Niko Ma nima@amd.com
Co-authored-by: Wu, Yutong yutong.wu@amd.com
Co-authored-by: figo fizhang@amd.com
Co-authored-by: AMD-yanfeiwang <yanfei.wang@amd.com>
Co-authored-by: Zhangheng <hzh0425@apache.org>
|
2026-07-01 22:21:37 +08:00 |
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Mohammad Miadh Angkad
|
a0d9791810
|
[CI] Fix fused EH norm CI registration (#29845)
|
2026-07-01 21:27:07 +08:00 |
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huangtingwei
|
1e80d938ff
|
[HiCache]fix draft host pool allocator type (#29823)
|
2026-07-01 19:31:16 +08:00 |
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Mick
|
79f334b1aa
|
[diffusion] CI: add 5090 job (#29791)
|
2026-07-01 19:09:43 +08:00 |
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Lukas Humbel
|
7d9de81cda
|
feat(hicache): Use NIXL path-mode (#27060)
|
2026-07-01 02:59:45 -07:00 |
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Mohammad Miadh Angkad
|
07ca24372b
|
Add fused EH norm for DeepSeek NextN (#29667)
|
2026-07-01 02:46:21 -07:00 |
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Daniel Stokes
|
8ee200972e
|
[fix] Add support for flashinfer MOE A2A to Qwen3 BF16 model path (#26255)
|
2026-07-01 01:59:54 -07:00 |
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Baizhou Zhang
|
677a11bfa9
|
[Doc] Tiny update dsv4 doc (#29827)
|
2026-07-01 01:47:35 -07:00 |
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ashwini rathiandSinghal, Shubham
|
5134dcdcab
|
[Intel XPU] Initially add nightly GSM8K accuracy tests for Llama-3.1-8B (TP=2) and Qwen3-32B (TP=4) (#28908)
Co-authored-by: Singhal, Shubham <shubham.singhal@intel.com>
|
2026-07-01 16:27:24 +08:00 |
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