 karverma-amd
|
fa8d22e665
|
[AMD][DSV4] Allow moe_a2a_backend='mori' with DSpark + dp attention (#39910)
|
2026-09-16 23:09:41 -07:00 |
|
|
karverma-amdandwunhuang
|
dae126d510
|
[AMD][DSv4] Fuse inverse-RoPE into the fp8 wo_a quant (stacked on #37423) (#37658)
Co-authored-by: wunhuang <wunhuang@amd.com>
|
2026-09-04 00:51:29 -07:00 |
|
|
karverma-amd
|
fbecd75c83
|
[AMD] fix: do not emit a shared-expert marker twice on the per-rank slot path (#36515)
|
2026-08-29 18:09:33 -07:00 |
|
|
karverma-amd
|
2a96ebf648
|
[AMD][DSV4] perf: retune decode split-K heuristic for MI355X (#36094)
|
2026-08-28 13:48:41 -07:00 |
|
|
karverma-amd
|
2b209711d8
|
[AMD][DSV4] perf: MXFP8 MoRI dispatch to match the w4a8 MoE input format (#36119)
|
2026-08-27 20:45:40 -07:00 |
|
|
karverma-amd
|
aa0a0aa3c3
|
[AMD][DSV4] perf: bound the MoRI receive buffer during decode (#36130)
|
2026-08-27 20:27:52 -07:00 |
|
|
|
d315eb7250
|
[AMD] DeepSeek-V4: add aiter fused mHC post+pre with cross-layer boundary dispatch (#32577)
Co-authored-by: 1am9trash <1am9trash@gmail.com>
Co-authored-by: HAI <hixiao@gmail.com>
|
2026-08-22 07:34:57 -07:00 |
|
|
|
44c90c6282
|
[AMD] DSv4: fuse the qk-norm-rope pair on the MTP target-verify path (#34973)
Co-authored-by: HAI <hixiao@gmail.com>
Co-authored-by: Thomas Wang <thomawan@amd.com>
|
2026-08-20 23:08:22 -07:00 |
|
|
|
bda9952377
|
[AMD] DeepSeek-V4 MI355X: eliminate bpreshuffle fp8-scale copies at producer sites (MoE down, MLA o_proj bmm) (#33166)
Co-authored-by: kk <43161300+kkHuang-amd@users.noreply.github.com>
Co-authored-by: Thomas Wang <thomawan@amd.com>
|
2026-08-20 21:46:23 -07:00 |
|
|
|
50dae2d99d
|
Amd/dsv4 shared experts fusion top6 (#32340)
Co-authored-by: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
Co-authored-by: kk <43161300+kkHuang-amd@users.noreply.github.com>
Co-authored-by: Thomas Wang <thomawan@amd.com>
|
2026-08-19 22:57:58 -07:00 |
|
|
|
f446e853e7
|
[AMD] DeepSeek-V4: route decode wo_a bf16 batched matmul to aiter batched_gemm_bf16 (#33313)
Co-authored-by: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
Co-authored-by: Thomas Wang <thomawan@amd.com>
|
2026-08-19 03:04:48 -07:00 |
|
|
karverma-amd
|
ce1830c59b
|
[AMD] DeepSeek-V4 MI355X: eliminate bpreshuffle fp8-scale relayout copy in dense w8a8 linear (#33165)
|
2026-08-19 03:02:40 -07:00 |
|
|
karverma-amd
|
24d625698d
|
[AMD] feat(moe): fold padded-topk_ids fill into fused shared-experts append+remap (#31370)
|
2026-08-18 02:32:57 -07:00 |
|
|
karverma-amd
|
ec32590025
|
feat(moriep): add fp4 combine dtype (SGLANG_MORI_COMBINE_DTYPE=fp4) (#30706)
|
2026-07-15 14:21:41 -07:00 |
|
|
|
0d89564d27
|
Support scheduler_recv_interval (recv skipper) under DP-attention (#30457)
Co-authored-by: Cursor <cursoragent@cursor.com>
Co-authored-by: hnyls2002 <lsyincs@gmail.com>
Co-authored-by: Liangsheng Yin <hnyls2002@gmail.com>
|
2026-07-14 14:02:58 -07:00 |
|
|
karverma-amdandsogalin_codegen
|
20b2817bdf
|
[AMD] Enable BCG on ROCm + route aiter prefill via MHA during PCG/BCG capture for Kimi-2.5 (#27833)
Co-authored-by: sogalin_codegen <39478626+sogalin@users.noreply.github.com>
|
2026-06-23 18:22:41 -07:00 |
|
|
karverma-amdandCursor
|
e0dc8b7137
|
[AMD] Fuse topk padded-token masking into a single Triton kernel (#28084)
Co-authored-by: Cursor <cursoragent@cursor.com>
|
2026-06-23 11:15:12 -07:00 |
|
|
karverma-amd
|
2552b860a3
|
[AMD][bugfix] Place TBO cuda-graph num_token_non_padded buffer on model devices (#28337)
|
2026-06-20 18:06:22 -07:00 |
|