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84d7604b7e
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[XPU] weekly simple model enablement 2026/09/14 (#39439)
Co-authored-by: Juan Muneton <102537701+jmunetong@users.noreply.github.com>
Co-authored-by: YangKai0616 <kai.yang@intel.com>
Co-authored-by: devan-carlin <devan-carlin@users.noreply.github.com>
Co-authored-by: Ashwini Rathi <arathi@habana.ai>
Co-authored-by: Ranjan Debnath <ranjan.debnath@intel.com>
Co-authored-by: Juan Muneton <juan.muneton.gallego@intel.com>
Co-authored-by: Amrutha M <amrutha.m@intel.com>
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2026-09-17 10:43:04 +08:00 |
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2641e427be
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Xpu/weekly simple model enablement 2026 08 30 (#37193)
Co-authored-by: dayanandav <dayananda.vasantha.kumar@intel.com>
Co-authored-by: Girijala, Pavan Sivaram <pavan.sivaram.girijala@intel.com>
Co-authored-by: Cui, Lily <lily.cui@intel.com>
Co-authored-by: Juan Muneton <juan.muneton.gallego@intel.com>
Co-authored-by: Gao, Pengfei <pengfei.gao@intel.com>
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2026-09-03 09:35:59 +08:00 |
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d82a1d4802
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[XPU] Pad MoE expert weight row stride to avoid L3 aliasing (#33905)
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
Co-authored-by: Alex Nails <alex.nails@radixark.ai>
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2026-08-11 15:54:13 -07:00 |
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Meng, Hengyu
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368936a62b
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[XPU] Integrate MoE and minor improvements in XPU attention backend (#13561)
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2026-02-04 23:09:59 -08:00 |
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b113c72e7a
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Init attention backend for Intel XPU (#10656)
Co-authored-by: guangyey <guangye.yu@intel.com>
Co-authored-by: DiweiSun <105627594+DiweiSun@users.noreply.github.com>
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2025-10-21 11:41:28 +08:00 |
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