 Liangsheng Yin
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22dfcdaa04
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revert flashinfer 0.6.11 bumps (#25310)
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2026-05-14 15:28:58 -07:00 |
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Yuhao Yang
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37f030a0de
|
[MoE] Decouple Mega MoE from DeepEP backend (#24884)
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2026-05-15 02:01:44 +08:00 |
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Jae B.
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90afd680f3
|
[Apple Silicon] [MLX] Auto-detect MLX-format quantization_config dict (#25191)
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2026-05-14 09:55:37 -07:00 |
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Liangsheng Yin
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4593bbdf31
|
ci: dynamic partition + LPT from live sglang-ci-stats model (#25263)
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2026-05-14 02:35:59 -07:00 |
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Xingyu Liu
|
2279b79f35
|
Add --model-config-parser registry for pluggable config formats (#25050)
Signed-off-by: Xingyu Liu <charlotteliu12x@gmail.com>
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2026-05-14 01:54:06 -07:00 |
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Alison Shao
|
36c9495aaa
|
ci: H200 conditional split + dsv4 est_time recalibration (h200 partition 6→2) (#25236)
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2026-05-13 22:28:37 -07:00 |
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Ke Bao
|
e4378ff37f
|
[UnifiedRadixCache] Fix HiCache load back start node (#25088)
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2026-05-14 13:18:12 +08:00 |
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|
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c701a08765
|
feat: [2/2][DeepEP] Add waterfill load balancing for shared expert dispatch (#19290)
Co-authored-by: Sisyphus <clio-agent@sisyphuslabs.ai>
Co-authored-by: root <aichenf@nvidia.com>
Co-authored-by: Cheng Wan <54331508+ch-wan@users.noreply.github.com>
|
2026-05-13 19:23:41 -07:00 |
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jundu
|
426dd339da
|
Migrate Intel CPU cases to the test/registered (#25139)
|
2026-05-14 10:22:09 +08:00 |
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Alison Shao
|
1e308aec66
|
ci: B200 conditional split + LPT_SLOP removal (stage-c partition 8→3) (#25203)
|
2026-05-13 18:40:45 -07:00 |
|
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Lianmin Zhengandcctry
|
5fb6bde6c0
|
Add sglang:get_loads_duration_seconds metric (#25163)
Co-authored-by: cctry <cctry@meta.com>
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2026-05-13 18:38:49 -07:00 |
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Baizhou Zhangandpranjalssh
|
b7f856df70
|
DeepSeek V4 w4a4 MegaMoE (#25052)
Co-authored-by: pranjalssh <adkz.photos@gmail.com>
|
2026-05-13 18:35:32 -07:00 |
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Liangsheng Yin
|
22d3f3996c
|
ci: decouple stage and runner for cuda registry (#25197)
|
2026-05-13 17:28:21 -07:00 |
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shiyu7
|
37f18438c5
|
[rebase]Deepseek_v4 support w4(mxfp4)a16 on hopper (#24986)
|
2026-05-13 16:33:46 -07:00 |
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sglang-botandClaude Opus 4.7
|
0a2615df24
|
chore: add vLLM SPDX copyright headers to ported files (#25182)
Co-authored-by: Claude Opus 4.7 <noreply@anthropic.com>
|
2026-05-13 15:17:30 -07:00 |
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Yuan Luoandluoyuan.luo
|
28758d37dd
|
Add FlashInfer SM90 cutlass MXFP4 MoE backend (W4A16) for GPT-OSS + DeepSeek-V4 (#24816)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
|
2026-05-13 14:53:18 -07:00 |
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Ata Fatahi
|
3178a70577
|
[PD Disaggregation] Fix priority scheduling in PD disaggregation mode (#25062)
Signed-off-by: Ata Fatahi <immrata@gmail.com>
|
2026-05-13 11:43:21 -07:00 |
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Le Zhangandlezhang
|
6ac30192fa
|
[MLX] Add on-the-fly --quantization mlx_q4 / mlx_q8 for Apple Silicon (#24907)
Co-authored-by: lezhang <lezhang@local>
|
2026-05-13 11:06:13 -07:00 |
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Mick
|
ff70aeac30
|
[diffusion] feat: add performance mode server args (#24491)
|
2026-05-14 00:57:46 +08:00 |
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Shangming CaiandHanHan009527
|
4984552cc9
|
Fix tests for decode radix cache (#25145)
Co-authored-by: HanHan009527 <hanhan7630@outlook.com>
|
2026-05-13 20:31:44 +08:00 |
|
|
Shangming Cai
|
5227b07669
|
[CI] Add DSV4 Flash disaggregation test (#24973)
Signed-off-by: Shangming Cai <csmthu@gmail.com>
|
2026-05-13 18:42:42 +08:00 |
|
|
YC Yen-Ching Tseng
|
cf92ccbf18
|
[AMD] Run jit kernel PR test through run_suite.py register mechanism (#24987)
|
2026-05-13 02:57:08 -07:00 |
|
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YC Yen-Ching Tseng
|
72b266d59b
|
[AMD] Disable unittest fail-fast for deepseekv4 perf test (#25039)
|
2026-05-12 22:47:31 -07:00 |
|
|
Michael
|
245f7d8026
|
[AMD] Register 5 server-style 1-GPU tests for AMD PR CI (#24572)
|
2026-05-12 22:45:52 -07:00 |
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|
RulinJuiceandRulinJuice
|
3f048c80b8
|
Reject repetition_penalty=0 in SamplingParams.verify() (#24874)
Co-authored-by: RulinJuice <265952454+RulinJuice@users.noreply.github.com>
|
2026-05-12 21:25:23 -07:00 |
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|
shuwenn
|
5ed9a494d0
|
[UnifiedTree] fix: allow partial match on evicted+backuped nodes (#24943)
|
2026-05-13 11:43:12 +08:00 |
|
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ZhanghengandJINZ
|
6140e45ef3
|
[UnifiedTree]: Fix the leaf determination logic in _cascade_evict. (#25068)
Co-authored-by: JINZ <1023553676@qq.com>
|
2026-05-13 10:57:32 +08:00 |
|
|
|
d6d3d0f599
|
Optimize SWA memory preallocation for disaggregated decode (#24857)
Co-authored-by: weireweire <weiliangl@nvidia.com>
Co-authored-by: Cheng Wan <chwan@rice.edu>
|
2026-05-13 09:09:34 +08:00 |
|
|
Emmanuel AcheampongandClaude Sonnet 4.6
|
b49d05fd0e
|
feat: add Crusoe managed inference backend (#20475)
Co-authored-by: Claude Sonnet 4.6 <noreply@anthropic.com>
|
2026-05-12 16:23:23 -07:00 |
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|
Brayden Zhongandb8zhong
|
d5f3254ed1
|
[Dependency] Flashinfer 0.6.8post1 -> 0.6.11 (#24452)
Co-authored-by: b8zhong <b8zhong@users.noreply.github.com>
|
2026-05-12 14:38:32 -07:00 |
|
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Liangsheng YinandQiaolin Yu
|
538832c8b7
|
spec: STANDALONE skips hidden_states end-to-end (Optional schema + None-safe consumers) (#25037)
Co-authored-by: Qiaolin Yu <qy254@cornell.edu>
|
2026-05-12 12:27:21 -07:00 |
|
|
|
e86fb42736
|
feat: emit per-iteration forward pass metrics via ZMQ PUB (#22789)
Co-authored-by: Ishan Dhanani <ishandhanani@gmail.com>
Co-authored-by: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
Co-authored-by: ishandhanani <82981111+ishandhanani@users.noreply.github.com>
|
2026-05-12 10:28:17 -07:00 |
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|
Ma Mingfei
|
71285335f7
|
Revert "Migrate Intel CPU cases to the test/registered." (#25044)
|
2026-05-12 13:32:47 +08:00 |
|
|
jundu
|
ecf5d844f5
|
Migrate Intel CPU cases to the test/registered. (#22670)
|
2026-05-12 13:27:51 +08:00 |
|
|
Ke Bao
|
d7f4761a48
|
[PD] Refactor hybrid state transfer (#24932)
|
2026-05-12 13:16:54 +08:00 |
|
|
Zhangheng
|
91907b7b93
|
[UnifiedTree]: Fix Unified HiCache tombstone lock release replay (#24972)
|
2026-05-12 13:16:06 +08:00 |
|
|
Liangsheng Yin
|
f3a8189e20
|
[Spec] Internal rename per N2 v2 naming rule (#25014)
|
2026-05-11 18:16:26 -07:00 |
|
|
|
e9dea79755
|
(3/n - prefill optimize)[LoRA][MoE] Optimize virtual experts: remove CPU-GPU sync & multi-block CUDA JIT histogram (#24262)
Co-authored-by: Cursor <cursoragent@cursor.com>
Co-authored-by: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
|
2026-05-11 16:36:57 -07:00 |
|
|
Liangsheng Yin
|
ce1736fcc6
|
[Spec] Remove dead kernel params; fix stale comment in trtllm_mla (#25010)
|
2026-05-11 14:50:46 -07:00 |
|
|
Jia Guo
|
da0eeb82f2
|
perf: add --prefill-only-disable-kv-cache to skip KV pool allocation (#23675)
|
2026-05-11 13:10:24 -07:00 |
|
|
Yan Ru Pei
|
4b6f776889
|
feat(kv-events): publish SWA radix cache events (#24718)
Signed-off-by: PeaBrane <yanrpei@gmail.com>
|
2026-05-11 10:31:45 -07:00 |
|
|
TianheandClaude Sonnet 4.6
|
95985f983d
|
feat(trace): support SGLANG_TRACE_LEVEL env var for startup trace level (#24716)
Co-authored-by: Claude Sonnet 4.6 <noreply@anthropic.com>
|
2026-05-11 10:31:03 -07:00 |
|
|
Ke Bao
|
36ba60ad49
|
Register SWA unit tests under unit/mem_cache (#24974)
|
2026-05-11 20:21:05 +08:00 |
|
|
Cheng WanandClaude Opus 4.7
|
044bb88a97
|
fix: SGLANG_RADIX_FORCE_MISS chunk-cache passthrough (#24950)
Co-authored-by: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
|
2026-05-11 00:07:46 -07:00 |
|
|
Bingxu ChenandCursor Agent
|
22543b1982
|
[AMD] DSv4 nightly hotfix + schedule-aware --continue-on-error in AMD CI (#24825)
Co-authored-by: Cursor Agent <cursoragent@cursor.com>
|
2026-05-10 21:46:32 -07:00 |
|
|
|
d82e339ce2
|
[Session R3] Add routed_experts_start_len for absolute routing slice control (#24851)
Co-authored-by: Byron Hsu <byron@periodiclabs.ai>
Co-authored-by: Cursor <cursoragent@cursor.com>
Co-authored-by: zyzshishui <zyzshishui@gmail.com>
Co-authored-by: Yuzhen Zhou <82826991+zyzshishui@users.noreply.github.com>
|
2026-05-10 10:04:43 -07:00 |
|
|
Yuan Luoandluoyuan.luo
|
d3fd91ed97
|
[Gemma4] Optimize Gemm4 with fused Q/K/V RMSNorm + per-expert FP8 ckpt loader (#24696)
Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com>
|
2026-05-10 00:24:12 -07:00 |
|
|
|
ef5e9f8aba
|
[DSV4] Cherry pick missing commits from deepseek_v4 branch and enhance tests (#24793)
Co-authored-by: Xinyuan Tong <115166877+JustinTong0323@users.noreply.github.com>
Co-authored-by: yueming-yuan <yym022502@gmail.com>
|
2026-05-09 04:15:37 -07:00 |
|
|
Brayden Zhongandb8zhong
|
8f33bee31b
|
Reland Cute-DSL FP4 dense GEMM (#23590)
Co-authored-by: b8zhong <b8zhong@users.noreply.github.com>
|
2026-05-09 02:20:58 -07:00 |
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|
shuwennandClaude Opus 4.7
|
9d12f9e6fa
|
[HiCache] ci: lower est_time for test_hicache_spec_file_storage (#24713)
Co-authored-by: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
|
2026-05-09 00:33:18 -07:00 |
|