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7eedd57ab0
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[ROCm] Fix EAGLE spec-decode verify silently sampling greedy on HIP (#37134)
Co-authored-by: JohnQinAMD <yanyuan.qin@amd.com>
Co-authored-by: Jiejing Zhang <jiejing.zhang@amd.com>
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2026-09-15 18:49:49 -07:00 |
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6657f7d844
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[MoE][ROCm] Admit the unified Triton router on ROCm, including single-group routing (#38328)
Co-authored-by: JohnQinAMD <yanyuan.qin@amd.com>
Co-authored-by: RuibinCheung <ruibzhan@amd.com>
Co-authored-by: Zhang, Jiejing <jiejing.zhang@amd.com>
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2026-09-12 16:21:28 -07:00 |
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5aa913e156
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[AMD][GLM-5.2] Keep GlmMoeDsa MoE e_score_correction_bias in fp32 (#37133)
Co-authored-by: JohnQinAMD <yanyuan.qin@amd.com>
Co-authored-by: Thomas Wang <thomawan@amd.com>
Co-authored-by: Zhang, Jiejing <jiejing.zhang@amd.com>
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2026-09-07 18:17:54 -07:00 |
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15aa2fb843
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[ROCm] Take the fused DSA metadata kernels and drop redundant work from the absorb path (#37124)
Co-authored-by: yanyuan.qin <yanyuan.qin@amd.com>
Co-authored-by: Zhang, Jiejing <jiejing.zhang@amd.com>
Co-authored-by: Thomas Wang <thomawan@amd.com>
Co-authored-by: HAI <hixiao@gmail.com>
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2026-09-06 17:39:37 -07:00 |
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xiaobochen-amdandZhang, Jiejing
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030d7e7e9b
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[ROCm] Define the DSA head-gate graph helpers on HIP (#37118)
Co-authored-by: Zhang, Jiejing <jiejing.zhang@amd.com>
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2026-09-02 22:55:45 -07:00 |
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xiaobochen-amdandfanxingran
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fd3e11973b
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[AMD][aiter] Fix cuda_graph_kv_indices OOB under page_size>1 (#24587)
Co-authored-by: fanxingran <fanxingran@amd.com>
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2026-05-22 23:19:46 -07:00 |
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xiaobochen-amdandkk
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d7ecab5113
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[ROCm]fix(aiter): cast fp8 prefill output back to model dtype (#22626)
Co-authored-by: kk <43161300+kkHuang-amd@users.noreply.github.com>
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2026-04-14 00:25:09 -07:00 |
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