8 Commits
Author SHA1 Message Date
8a6ab89bf0 [AMD] Enable Fast Triton Sparse MLA backend (#30575)
Co-authored-by: clintg6 <7388379+clintg6@users.noreply.github.com>
Co-authored-by: HAI <hixiao@gmail.com>
2026-09-10 01:58:00 -07:00
3c2724c48d [AMD] Optimize Kimi-K3 Triton MLA prefill on gfx950 (#35770)
Co-authored-by: clintg6 <7388379+clintg6@users.noreply.github.com>
Co-authored-by: Thomas Wang <thomawan@amd.com>
Co-authored-by: HAI <hixiao@gmail.com>
Co-authored-by: kk <43161300+kkHuang-amd@users.noreply.github.com>
2026-09-04 17:44:30 -07:00
c436a8161a [AMD] Enable HiSparse on ROCm (#26639)
Co-authored-by: clintg6 <7388379+clintg6@users.noreply.github.com>
Co-authored-by: HAI <hixiao@gmail.com>
2026-06-19 11:59:45 -07:00
Clintandclintg6 fac11f3bc1 [AMD] Document Mori XGMI for Single-Node PD Disaggregation (#25094)
Co-authored-by: clintg6 <7388379+clintg6@users.noreply.github.com>
2026-06-18 19:25:49 -07:00
Clintandclintg6 cfb7fb4fad [AMD] Fix TP2 DeepSeek-R1 nhead=64 MLA decode crash and add nightly coverage (#27188)
Co-authored-by: clintg6 <7388379+clintg6@users.noreply.github.com>
2026-06-03 16:56:05 -07:00
Clint 87dad74b33 Add benchmark/hicache/bench_warm_cache.py for exact warm-cache shared-prefix benchmarking (#24083) 2026-04-30 23:48:32 -07:00
Clint 27053aa5ed Fix MLA decode path returning unwritten (padded) rows (#19902) 2026-03-06 00:54:29 -08:00
Clint 3224836d8b Update rocm7.2 Dockerfile to install amdsmi for QuickReduce Initialization (#19091) 2026-02-22 21:32:14 -08:00