[XPU]REPO cache dtype xpu align with cuda (#31140)

2026-07-16 10:30:01 +08:00
parent 3a8ddd3fd0
commit f28ce5c420
1 changed files with 1 additions and 1 deletions
@@ -95,7 +95,7 @@ class RotaryEmbedding(MultiPlatformOp):

        cache = self._compute_cos_sin_cache()
        # NOTE(ByronHsu): cache needs to be in FP32 for numerical stability.
-        if not (_is_cuda or envs.SGLANG_ROPE_CACHE_FP32.get()):
+        if not (_is_cuda or _is_xpu or envs.SGLANG_ROPE_CACHE_FP32.get()):
            cache = cache.to(dtype)

        if (