[AMD] Remove ROCm page_first+kernel -> layer_first HiCache fallback (follow-up to #28534) (#30622)

This commit is contained in:
AMD-yanfeiwang
2026-07-14 22:48:16 -07:00
committed by GitHub
parent 0832d856ca
commit a3194d3585
-14
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@@ -5805,20 +5805,6 @@ class ServerArgs:
"Page first layout is not supported with direct IO backend, switching to page first direct layout" "Page first layout is not supported with direct IO backend, switching to page first direct layout"
) )
# The page_first kernel write-back relies on the CUDA-only JIT staged
# kernel. On ROCm it falls back to a kernel that requires CUDA index
# tensors and crashes on host write-back, so use layer_first there.
if (
self.hicache_mem_layout == "page_first"
and self.hicache_io_backend == "kernel"
and is_hip()
):
self.hicache_mem_layout = "layer_first"
logger.warning(
"page_first kernel write-back requires the CUDA JIT kernel; "
"falling back to layer_first layout on ROCm."
)
def _resolve_storage_layout_compatibility(self): def _resolve_storage_layout_compatibility(self):
if ( if (
self.hicache_storage_backend != "mooncake" self.hicache_storage_backend != "mooncake"