From a3194d358592cfc94b94a8107a9fccb2cd6b9a35 Mon Sep 17 00:00:00 2001 From: AMD-yanfeiwang Date: Wed, 15 Jul 2026 13:48:16 +0800 Subject: [PATCH] [AMD] Remove ROCm page_first+kernel -> layer_first HiCache fallback (follow-up to #28534) (#30622) --- python/sglang/srt/server_args.py | 14 -------------- 1 file changed, 14 deletions(-) diff --git a/python/sglang/srt/server_args.py b/python/sglang/srt/server_args.py index 2c8525f71..c000a88eb 100644 --- a/python/sglang/srt/server_args.py +++ b/python/sglang/srt/server_args.py @@ -5805,20 +5805,6 @@ class ServerArgs: "Page first layout is not supported with direct IO backend, switching to page first direct layout" ) - # The page_first kernel write-back relies on the CUDA-only JIT staged - # kernel. On ROCm it falls back to a kernel that requires CUDA index - # tensors and crashes on host write-back, so use layer_first there. - if ( - self.hicache_mem_layout == "page_first" - and self.hicache_io_backend == "kernel" - and is_hip() - ): - self.hicache_mem_layout = "layer_first" - logger.warning( - "page_first kernel write-back requires the CUDA JIT kernel; " - "falling back to layer_first layout on ROCm." - ) - def _resolve_storage_layout_compatibility(self): if ( self.hicache_storage_backend != "mooncake"