[AMD] Register 3 CPU-bound / triton unit + light-integration tests for AMD 1-GPU PR CI (#31088)

This commit is contained in:
Michael
2026-07-15 14:36:05 -07:00
committed by GitHub
parent ec32590025
commit 67148447a6
3 changed files with 20 additions and 4 deletions
@@ -6,10 +6,15 @@ from sglang.kernels.ops.attention.fla.chunk import chunk_gated_delta_rule
from sglang.kernels.ops.attention.fla.fused_recurrent import (
fused_recurrent_gated_delta_rule,
)
from sglang.srt.utils import get_device
from sglang.test.ci.ci_register import register_cuda_ci, register_xpu_ci
from sglang.srt.utils import get_device, is_hip
from sglang.test.ci.ci_register import (
register_amd_ci,
register_cuda_ci,
register_xpu_ci,
)
register_cuda_ci(est_time=11, stage="base-b", runner_config="1-gpu-large")
register_amd_ci(est_time=11, stage="stage-b", runner_config="1-gpu-large-amd")
register_xpu_ci(est_time=900, suite="stage-b-test-1-gpu-xpu")
@@ -183,6 +188,11 @@ class TestChunkGatedDeltaRule(unittest.TestCase):
def test_dim_k_gt_v(self):
self._check_shape(B=4, T_per_seq=128, H=16, K=128, V=64, pool_size=32)
@unittest.skipIf(
is_hip(),
"K=V=256 head dim exceeds the FLA chunk triton kernel's shared-memory "
"budget on ROCm (out-of-resource at launch); smaller head dims pass.",
)
def test_dim_256x256(self):
self._check_shape(B=4, T_per_seq=128, H=16, K=256, V=256, pool_size=32)
@@ -13,7 +13,7 @@ from prometheus_client.samples import Sample
from sglang.srt.disaggregation.encode_server import MINIMUM_PNG_PICTURE_BASE64
from sglang.srt.utils import kill_process_tree
from sglang.srt.utils.network import get_zmq_socket_on_host
from sglang.test.ci.ci_register import register_cuda_ci
from sglang.test.ci.ci_register import register_amd_ci, register_cuda_ci
from sglang.test.test_utils import (
DEFAULT_SMALL_VLM_MODEL_NAME_FOR_TEST,
DEFAULT_TIMEOUT_FOR_SERVER_LAUNCH,
@@ -23,6 +23,7 @@ from sglang.test.test_utils import (
)
register_cuda_ci(est_time=180, stage="base-b", runner_config="1-gpu-small")
register_amd_ci(est_time=180, stage="stage-b", runner_config="1-gpu-small-amd")
_MODEL_NAME = DEFAULT_SMALL_VLM_MODEL_NAME_FOR_TEST
@@ -16,10 +16,15 @@ from sglang.srt.model_executor.forward_batch_info import ForwardMode
from sglang.srt.speculative.adaptive_runtime_state import SpecRuntimeState
from sglang.srt.speculative.eagle_utils import organize_draft_results
from sglang.srt.speculative.eagle_worker_v2 import EagleDraftWorker, EAGLEWorkerV2
from sglang.test.ci.ci_register import register_cpu_ci, register_cuda_ci
from sglang.test.ci.ci_register import (
register_amd_ci,
register_cpu_ci,
register_cuda_ci,
)
from sglang.test.test_utils import CustomTestCase
register_cuda_ci(est_time=20, stage="base-b", runner_config="1-gpu-small")
register_amd_ci(est_time=20, stage="stage-b", runner_config="1-gpu-small-amd")
register_cpu_ci(est_time=20, suite="base-a-test-cpu")
DEVICE = "cuda" if torch.cuda.is_available() else "cpu"