[R3] Avoid implicit CUDA sync in routed experts DP slicing (#24550)
Co-authored-by: Byron Hsu <byronhsu1230@gmail.com>
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@@ -402,6 +402,23 @@ def get_dp_local_info(forward_batch: ForwardBatch) -> Tuple[torch.Tensor, torch.
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return forward_batch.dp_local_start_pos, forward_batch.dp_local_num_tokens
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def get_dp_local_slice_cpu(
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forward_batch: ForwardBatch,
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can_run_graph: bool,
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cuda_graph_batch: Optional[int],
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) -> Tuple[int, int]:
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# CPU (start, length) slice for DP-local data in a rank-padded buffer.
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# Returns Python ints (no D2H sync) and handles the cuda-graph-padded layout.
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global_num_tokens = forward_batch.global_num_tokens_cpu
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dp_rank = get_attention_dp_rank()
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local_num_tokens = global_num_tokens[dp_rank]
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if can_run_graph:
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local_start_pos = dp_rank * cuda_graph_batch
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else:
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local_start_pos = sum(global_num_tokens[:dp_rank])
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return local_start_pos, local_num_tokens
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@triton.jit
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def memcpy_triton_kernel(
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dst_ptr,
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@@ -7,9 +7,8 @@ import torch
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from sglang.srt.configs.model_config import ModelConfig
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from sglang.srt.layers.dp_attention import (
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attn_tp_all_gather_into_tensor,
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get_attention_dp_rank,
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get_attention_tp_size,
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get_dp_local_info,
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get_dp_local_slice_cpu,
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is_dp_attention_enabled,
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)
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from sglang.srt.layers.moe import get_moe_a2a_backend
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@@ -112,9 +111,10 @@ class RoutedExpertsCapturer(BaseTopkCapturer):
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# the per-rank buffer, so the local DP rank's data lives at [0:N_local]
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# rather than at the global [start_pos:end_pos] offset.
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if is_dp_attention_enabled() and not get_moe_a2a_backend().is_deepep():
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local_start_pos, local_num_tokens = get_dp_local_info(forward_batch)
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if can_run_graph:
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local_start_pos = get_attention_dp_rank() * cuda_graph_batch
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# GPU->CPU sync would break overlap; operate on CPU directly.
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local_start_pos, local_num_tokens = get_dp_local_slice_cpu(
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forward_batch, can_run_graph, cuda_graph_batch
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)
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local_end_pos = local_start_pos + local_num_tokens
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else:
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local_start_pos, local_end_pos = 0, forward_batch.out_cache_loc.shape[0]
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