[AMD] Register 5 CI-verified 1-GPU kernel/attention unit tests for AMD PR CI (#30290)

test/registered/attention/test_gdn_noncontiguous_stride.py

@@ -12,9 +12,10 @@ from sglang.srt.layers.attention.fla.fused_gdn_gating import fused_gdn_gating
 from sglang.srt.layers.attention.fla.fused_sigmoid_gating_recurrent import (
     fused_sigmoid_gating_delta_rule_update,
 )
-from sglang.test.ci.ci_register import register_cuda_ci
+from sglang.test.ci.ci_register import register_amd_ci, register_cuda_ci
 
 register_cuda_ci(est_time=7, stage="base-b", runner_config="1-gpu-large")
+register_amd_ci(est_time=7, stage="stage-b", runner_config="1-gpu-large-amd")
 
 
 def _make_noncontiguous_ab(batch, num_heads, dtype=torch.bfloat16, device="cuda"):

test/registered/attention/test_kda_kernels.py

@@ -15,9 +15,10 @@ from sglang.srt.layers.attention.fla.kda import (
     kda_gate_chunk_cumsum,
 )
 from sglang.srt.utils.common import get_device
-from sglang.test.ci.ci_register import register_cuda_ci
+from sglang.test.ci.ci_register import register_amd_ci, register_cuda_ci
 
 register_cuda_ci(est_time=12, stage="base-b", runner_config="1-gpu-large")
+register_amd_ci(est_time=12, stage="stage-b", runner_config="1-gpu-large-amd")
 
 
 @unittest.skipIf(

test/registered/attention/test_trtllm_mha_page_table.py

@@ -21,11 +21,12 @@ import torch
 from sglang.srt.layers.attention.triton_ops.trtllm_mha_page_table import (
     build_trtllm_mha_page_table,
 )
-from sglang.test.ci.ci_register import register_cuda_ci
+from sglang.test.ci.ci_register import register_amd_ci, register_cuda_ci
 from sglang.test.test_utils import CustomTestCase
 
 # Triton kernel unit test for the trtllm_mha device-side page-table build.
 register_cuda_ci(est_time=14, stage="base-b", runner_config="1-gpu-small")
+register_amd_ci(est_time=14, stage="stage-b", runner_config="1-gpu-small-amd")
 
 
 def _build_page_table_reference(

test/registered/kernels/test_dsa_metadata.py

@@ -7,10 +7,11 @@ from sglang.srt.layers.attention.triton_ops.dsa_metadata import (
     fused_dsa_draft_extend_metadata,
     fused_dsa_target_verify_metadata,
 )
-from sglang.test.ci.ci_register import register_cuda_ci
+from sglang.test.ci.ci_register import register_amd_ci, register_cuda_ci
 from sglang.test.test_utils import CustomTestCase
 
 register_cuda_ci(est_time=15, stage="base-b", runner_config="1-gpu-large")
+register_amd_ci(est_time=15, stage="stage-b", runner_config="1-gpu-large-amd")
 
 
 def _cu_seqlens(seqlens: torch.Tensor) -> torch.Tensor:

test/registered/unit/mem_cache/test_unified_mamba_views.py

@@ -46,12 +46,13 @@ import unittest
 
 import torch
 
-from sglang.test.ci.ci_register import register_cuda_ci
+from sglang.test.ci.ci_register import register_amd_ci, register_cuda_ci
 
 _HAS_CUDA = torch.cuda.is_available()
 _DEV = "cuda" if _HAS_CUDA else "cpu"
 
 register_cuda_ci(est_time=30, stage="base-b", runner_config="1-gpu-small")
+register_amd_ci(est_time=30, stage="stage-b", runner_config="1-gpu-small-amd")
 
 
 def _make_pool(