From 090efa27a239a508138039e2a568035097fe5dc5 Mon Sep 17 00:00:00 2001 From: Michael <13900043+michaelzhang-ai@users.noreply.github.com> Date: Tue, 7 Jul 2026 14:44:45 -0700 Subject: [PATCH] [AMD] Register 5 CI-verified 1-GPU kernel/attention unit tests for AMD PR CI (#30290) --- test/registered/attention/test_gdn_noncontiguous_stride.py | 3 ++- test/registered/attention/test_kda_kernels.py | 3 ++- test/registered/attention/test_trtllm_mha_page_table.py | 3 ++- test/registered/kernels/test_dsa_metadata.py | 3 ++- test/registered/unit/mem_cache/test_unified_mamba_views.py | 3 ++- 5 files changed, 10 insertions(+), 5 deletions(-) diff --git a/test/registered/attention/test_gdn_noncontiguous_stride.py b/test/registered/attention/test_gdn_noncontiguous_stride.py index e60a5ef2a..f008804d6 100644 --- a/test/registered/attention/test_gdn_noncontiguous_stride.py +++ b/test/registered/attention/test_gdn_noncontiguous_stride.py @@ -12,9 +12,10 @@ from sglang.srt.layers.attention.fla.fused_gdn_gating import fused_gdn_gating from sglang.srt.layers.attention.fla.fused_sigmoid_gating_recurrent import ( fused_sigmoid_gating_delta_rule_update, ) -from sglang.test.ci.ci_register import register_cuda_ci +from sglang.test.ci.ci_register import register_amd_ci, register_cuda_ci register_cuda_ci(est_time=7, stage="base-b", runner_config="1-gpu-large") +register_amd_ci(est_time=7, stage="stage-b", runner_config="1-gpu-large-amd") def _make_noncontiguous_ab(batch, num_heads, dtype=torch.bfloat16, device="cuda"): diff --git a/test/registered/attention/test_kda_kernels.py b/test/registered/attention/test_kda_kernels.py index b88c03b68..4e273d6a4 100644 --- a/test/registered/attention/test_kda_kernels.py +++ b/test/registered/attention/test_kda_kernels.py @@ -15,9 +15,10 @@ from sglang.srt.layers.attention.fla.kda import ( kda_gate_chunk_cumsum, ) from sglang.srt.utils.common import get_device -from sglang.test.ci.ci_register import register_cuda_ci +from sglang.test.ci.ci_register import register_amd_ci, register_cuda_ci register_cuda_ci(est_time=12, stage="base-b", runner_config="1-gpu-large") +register_amd_ci(est_time=12, stage="stage-b", runner_config="1-gpu-large-amd") @unittest.skipIf( diff --git a/test/registered/attention/test_trtllm_mha_page_table.py b/test/registered/attention/test_trtllm_mha_page_table.py index f10a680b7..161720547 100644 --- a/test/registered/attention/test_trtllm_mha_page_table.py +++ b/test/registered/attention/test_trtllm_mha_page_table.py @@ -21,11 +21,12 @@ import torch from sglang.srt.layers.attention.triton_ops.trtllm_mha_page_table import ( build_trtllm_mha_page_table, ) -from sglang.test.ci.ci_register import register_cuda_ci +from sglang.test.ci.ci_register import register_amd_ci, register_cuda_ci from sglang.test.test_utils import CustomTestCase # Triton kernel unit test for the trtllm_mha device-side page-table build. register_cuda_ci(est_time=14, stage="base-b", runner_config="1-gpu-small") +register_amd_ci(est_time=14, stage="stage-b", runner_config="1-gpu-small-amd") def _build_page_table_reference( diff --git a/test/registered/kernels/test_dsa_metadata.py b/test/registered/kernels/test_dsa_metadata.py index e9592e3ff..de1dc0950 100644 --- a/test/registered/kernels/test_dsa_metadata.py +++ b/test/registered/kernels/test_dsa_metadata.py @@ -7,10 +7,11 @@ from sglang.srt.layers.attention.triton_ops.dsa_metadata import ( fused_dsa_draft_extend_metadata, fused_dsa_target_verify_metadata, ) -from sglang.test.ci.ci_register import register_cuda_ci +from sglang.test.ci.ci_register import register_amd_ci, register_cuda_ci from sglang.test.test_utils import CustomTestCase register_cuda_ci(est_time=15, stage="base-b", runner_config="1-gpu-large") +register_amd_ci(est_time=15, stage="stage-b", runner_config="1-gpu-large-amd") def _cu_seqlens(seqlens: torch.Tensor) -> torch.Tensor: diff --git a/test/registered/unit/mem_cache/test_unified_mamba_views.py b/test/registered/unit/mem_cache/test_unified_mamba_views.py index 15871265e..e234ab574 100644 --- a/test/registered/unit/mem_cache/test_unified_mamba_views.py +++ b/test/registered/unit/mem_cache/test_unified_mamba_views.py @@ -46,12 +46,13 @@ import unittest import torch -from sglang.test.ci.ci_register import register_cuda_ci +from sglang.test.ci.ci_register import register_amd_ci, register_cuda_ci _HAS_CUDA = torch.cuda.is_available() _DEV = "cuda" if _HAS_CUDA else "cpu" register_cuda_ci(est_time=30, stage="base-b", runner_config="1-gpu-small") +register_amd_ci(est_time=30, stage="stage-b", runner_config="1-gpu-small-amd") def _make_pool(