Liangsheng Yin e5c46ff07d [Fix] Route asymmetric-KV models to fa4 on SM100 and pin MiMoV2 FP8 MoE to flashinfer_trtllm (#32818)

2026-07-29 16:37:43 -07:00

..

sglang

[Fix] Route asymmetric-KV models to fa4 on SM100 and pin MiMoV2 FP8 MoE to flashinfer_trtllm (#32818)

2026-07-29 16:37:43 -07:00

tools

Fix get_version_tag.py to handle dot-separated post versions (#22385)

2026-04-08 15:18:22 -07:00

MANIFEST.in

[Kernel] Move sgl-kernel under sglang.kernels.aot (#32648)

2026-07-29 17:25:00 +08:00

pyproject_cpu.toml

[core/loader] Add presharded load format (#24256)

2026-07-25 13:03:39 -07:00

pyproject_npu.toml

[core/loader] Add presharded load format (#24256)

2026-07-25 13:03:39 -07:00

pyproject_other.toml

[core/loader] Add presharded load format (#24256)

2026-07-25 13:03:39 -07:00

pyproject_xpu.toml

[core/loader] Add presharded load format (#24256)

2026-07-25 13:03:39 -07:00

pyproject.toml

[Kernel] Move sgl-kernel under sglang.kernels.aot (#32648)

2026-07-29 17:25:00 +08:00

setup.py

create rust workspace (#32014)

2026-07-23 12:02:41 -07:00