Liangsheng Yin 5f315c74da [CI] Enforce modern stage=/runner_config= form for dispatchable test suites (#28108)

2026-06-12 17:32:54 -07:00

..

test_encoder_dp.py

[test/fix]: isolate VLM MMMU eval output dirs to fix nightly-4-gpu cross-test pollution (#24623)

2026-05-08 15:01:53 -07:00

test_evs.py

[Xeon] CPU CI enhancement for Intel Xeon platforms (#24649)

2026-05-28 10:49:04 +08:00

test_token_id_retokenize_e2e.py

[CI] Enforce modern stage=/runner_config= form for dispatchable test suites (#28108)

2026-06-12 17:32:54 -07:00

test_video_utils.py

[Xeon] CPU CI enhancement for Intel Xeon platforms (#24649)

2026-05-28 10:49:04 +08:00

test_vision_chunked_prefill.py

[CI] Rename basic CI stage-a/b/c -> base-a/b/c for symmetry with extra CI (#25420)

2026-05-15 18:26:55 -07:00

test_vision_openai_server_a.py

perf: eliminate CUDA syncs in VLM embed path (#26082)

2026-06-12 13:15:56 +08:00

test_vlm_input_format.py

[CI] Rename basic CI stage-a/b/c -> base-a/b/c for symmetry with extra CI (#25420)

2026-05-15 18:26:55 -07:00

test_vlm_tp4.py

[CI] Rename basic CI stage-a/b/c -> base-a/b/c for symmetry with extra CI (#25420)

2026-05-15 18:26:55 -07:00