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ae2bd5728b79cdbce5efbc592743c457dde2db62
sglang/test/registered/mlx/models_e2e
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Alex NailsSiming DengR0CKSTARJiminatordamahuaClaude Opus 5
2969ab3d41 [MLX] Window-bounded SWA KV storage and in-graph sampling (#34166)
Co-authored-by: Siming Deng <siming_deng_stat@163.com>
Co-authored-by: R0CKSTAR <yeahdongcn@gmail.com>
Co-authored-by: Jiminator <Jiminator@users.noreply.github.com>
Co-authored-by: damahua <damahua@users.noreply.github.com>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
2026-08-09 21:28:51 -07:00
..
test_gpt_oss_mlx_correctness.py
[MLX] Window-bounded SWA KV storage and in-graph sampling (#34166)
2026-08-09 21:28:51 -07:00
test_qwen2_moe_mlx_correctness.py
[Apple Silicon] [CI] Move the MLX lane to the check-changes + pr-gate composite (#30121)
2026-07-10 22:00:15 -07:00
test_qwen3_moe_mlx_correctness.py
[Apple Silicon] [CI] Move the MLX lane to the check-changes + pr-gate composite (#30121)
2026-07-10 22:00:15 -07:00
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