Polisetty V R K Jyothendra Varma 449f0da78f [Intel GPU] DeepSeek V4 15/N: Add silu_and_mul_clamp support to triton fused_moe for XPU (#33808) ...

Signed-off-by: P V R K Jyothendra Varma <polisetty.v.r.k.jyothendra.varma@intel.com>

2026-08-09 21:22:05 -07:00

..

sglang

[Intel GPU] DeepSeek V4 15/N: Add silu_and_mul_clamp support to triton fused_moe for XPU (#33808)

2026-08-09 21:22:05 -07:00

tools

Fix get_version_tag.py to handle dot-separated post versions (#22385)

2026-04-08 15:18:22 -07:00

MANIFEST.in

[Kernel] Move sgl-kernel under sglang.kernels.aot (#32648)

2026-07-29 17:25:00 +08:00

pyproject_cpu.toml

[core/loader] Add presharded load format (#24256)

2026-07-25 13:03:39 -07:00

pyproject_npu.toml

[core/loader] Add presharded load format (#24256)

2026-07-25 13:03:39 -07:00

pyproject_other.toml

[Inkling] silu_and_mul: replace helion kernels with plain Triton (#33903)

2026-08-08 15:00:23 +08:00

pyproject_xpu.toml

[core/loader] Add presharded load format (#24256)

2026-07-25 13:03:39 -07:00

pyproject.toml

[Inkling] silu_and_mul: replace helion kernels with plain Triton (#33903)

2026-08-08 15:00:23 +08:00

setup.py

[mm] sglang-mm: server vision pipeline core (fetch/driver/pipeline) + Qwen VL (#32364)

2026-08-04 00:47:00 -07:00