Jae B. a91c2e6596 [Apple Silicon] [CI] Move the MLX lane to the check-changes + pr-gate composite (#30121)

2026-07-10 22:00:15 -07:00

..

__init__.py

[CI] Migrate LoRA tests to test/registered/lora/ (#15176)

2025-12-17 13:19:42 -08:00

ci_register.py

[Apple Silicon] [CI] Move the MLX lane to the check-changes + pr-gate composite (#30121)

2026-07-10 22:00:15 -07:00

ci_stress_utils.py

[misc] Move bench_serving into sglang.benchmark (#28996)

2026-06-23 19:34:11 -07:00

ci_utils.py

ci: emit machine-readable TIMINGS block at end of run_unittest_files (#25232)

2026-05-13 21:56:54 -07:00