Commit Graph
12209 Commits
Author SHA1 Message Date
Kevin MiandClaude Fable 5 f586654518 [diffusion] feat: support FastH3 (4-step VSA-distilled MiniMax-H3) with a VSA-H3 attention backend (#37480)
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
2026-09-02 21:39:54 +08:00
Liangsheng Yin 862a909a08 [Fix] Lock PP dynamic-chunk profiling requests before releasing through the tree cache (#37509) 2026-09-02 02:09:01 -07:00
Liangsheng Yin ebfd8c60e5 [CI] Install sgl-eval from PyPI through the test extra (#37504) 2026-09-02 01:45:25 -07:00
Shuwen WangandClaude Opus 5 fe3d4b9bbb fix: restore missing get_component_forced_attn_backend import in minimax_h3 (#37566)
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
2026-09-02 15:58:31 +08:00
4b329482e8 [diffusion] feat: support cube sparse attention for minimax h3 (#34893)
Co-authored-by: zhenaozhenfu <zhenaozhenfu@minimaxi.com>
Co-authored-by: Reynor <reynor@minimaxi.com>
2026-09-02 15:21:33 +08:00
Mick 9175590aa0 [diffusion] refactor: admit explicit attention backends by capability (#37441) 2026-09-02 15:17:57 +08:00
Lianmin Zheng f8f04bafa8 Rust server: align launcher and request validation behavior (#37327) 2026-09-01 23:42:36 -07:00
jasonjk-park 83bd2c473f Allow custom policy for adaptive speculative decoding (#37274) 2026-09-01 23:15:21 -07:00
Liangsheng Yin 01c3a5f54f [misc] Resolve SWA ownership at enqueue time for grouped free() (#36646) 2026-09-01 23:06:55 -07:00
Liangsheng Yin 832d029870 [mem_cache] Split duplicate insert frees at the SWA eviction floor (#37481) 2026-09-01 23:01:40 -07:00
YAMY a6a19f9290 [Bugfix] Skip absent radix lock during cache cleanup (#37494) 2026-09-01 22:50:19 -07:00
Khoa PhamandClaude Opus 5 c66a285c94 [Kernel] GLM 5.3 Flash related kernels (ported from #36507) (#37477)
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
2026-09-01 22:17:09 -07:00
KnightYao a58751d54d [Fix ] Fix Spark2.5 hybrid SWA config (#37335) 2026-09-01 20:29:09 -07:00
Wes 2d9c64394f Fix reasoning metrics and add TPOT to bench_multiturn (#35443) 2026-09-02 11:28:47 +08:00
Xiaoyu Zhang 403a15c163 [CI] Batch CPU test workers (#37252) 2026-09-02 10:35:14 +08:00
Xiaoyu Zhang 1aa8299d1d [Diffusion] Add cumulative extra-high quality tier (#37422) 2026-09-02 10:26:13 +08:00
26f760d5c0 [CPU] Support FP8 KV cache (#32733)
Co-authored-by: Zheng, Beilei <beilei.zheng@intel.com>
Co-authored-by: mingfeima <mingfei.ma@intel.com>
2026-09-02 10:20:54 +08:00
Yongji WuandLianmin Zheng b83bf7a65f [Bugfix] Avoid scanning crash-dump token buffers during GC (#37297)
Co-authored-by: Lianmin Zheng <lianminzheng@gmail.com>
2026-09-01 18:52:10 -07:00
Mick 22195709d1 [diffusion] refactor: remove component loader capability switches (#36824) 2026-09-02 09:48:50 +08:00
Yichao Fu 66de38f30c Decouple ragged CUDA graph request and token capacities (#37300) 2026-09-01 18:48:11 -07:00
Mick dde0ecdb90 [diffusion] feat: support spargeattention (#37437) 2026-09-02 09:42:33 +08:00
kkandwunhuang dc276264cb [AMD] Perf Kimi-K3 fuse ROCm KDA decode boundary (#34198)
Co-authored-by: wunhuang <wunhuang@amd.com>
2026-09-01 18:35:48 -07:00
8b596c10b0 [PD] Diversify fake-prefill handoff tokens (#37302)
Co-authored-by: xingyuliu <xingyuliu@fb.com>
Co-authored-by: Lianmin Zheng <lianminzheng@gmail.com>
2026-09-01 18:34:38 -07:00
Even Zhou 9cc43ca4e1 [NPU] Update sgl-kernel-npu version to 2026.9.0 and move memfabric deps into pyproject (#37399) 2026-09-02 08:57:59 +08:00
Xiaoyu ZhangandCursor f4c17fed07 [Diffusion] Fuse FLUX.2 NVFP4 FC1, SwiGLU, and FC2 quantization (#37096)
Co-authored-by: Cursor <cursoragent@cursor.com>
2026-09-02 08:21:14 +08:00
c593527f33 [Kernel] Add KDA NVFP4 GEMM for Qwen3.x on SM120 (#36865)
Co-authored-by: Song Bian <biansonghz@gmail.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
2026-09-02 08:16:54 +08:00
33428d3dae Fix GPU kernel ordering and MXFP8 quantization dispatch (#37331)
Co-authored-by: Pranjal Shankhdhar <pranjalssh@meta.com>
Co-authored-by: Chengze Fan <fancz2002@gmail.com>
2026-09-01 17:09:44 -07:00
YAMY 221a6273ce [Kernel] Avoid zero-bias allocation in fused softmax routing (#36811) 2026-09-01 16:29:57 -07:00
Yikai Zhangandamdpilot-upstream-sync 9978aaec8b [ROCm][Bugfix] Cap the DSA MQA-logits budget at AITER's buffer_store limit (#36960)
Co-authored-by: amdpilot-upstream-sync <amdpilot-upstream-sync@users.noreply.github.com>
2026-09-01 15:40:12 -07:00
f8618714c5 add reindex_device_id to device OOT plugin (#36220)
Co-authored-by: Akash Palla <apalla@fb.com>
Co-authored-by: Alex Nails <alex.nails@radixark.ai>
2026-09-01 15:26:47 -07:00
fb8d7eedda Fix dummy initialization of inverse weight scales (#35491)
Co-authored-by: weireweire <20922698+weireweire@users.noreply.github.com>
Co-authored-by: Po-Han Huang (NVIDIA) <53919306+nvpohanh@users.noreply.github.com>
2026-09-01 14:19:14 -07:00
Po-Han Huang (NVIDIA) e57e934bcc [Bugfix] Accept int64 top-k IDs in FlashInfer routed MoE packer (#32882) 2026-09-01 14:17:46 -07:00
Liangsheng Yin 83a9b5dd88 [mem_cache] Drop the torch.unique sync from the SWA page expansion (#37463) 2026-09-01 14:16:47 -07:00
b24c8f10e7 [FlashInfer] Avoid D2H sync for sliding-window lengths (#32218)
Co-authored-by: llilian73 <204300658+llilian73@users.noreply.github.com>
Co-authored-by: hnyls2002 <lsyincs@gmail.com>
Co-authored-by: Liangsheng Yin <hnyls2002@gmail.com>
2026-09-01 14:08:22 -07:00
Cheng Wan 0b1ce3d140 [Feature] Unified memory: support decode context parallelism for Kimi-Linear (#36890) 2026-09-01 12:44:26 -07:00
cctryandcctry 9a05b470fa [Memory] Size the CUDA graph pool from warmup measurements and fix graph-pool borrowing (#36911)
Co-authored-by: cctry <cctry@fb.com>
2026-09-01 09:32:38 -07:00
c34f378342 fix(nixl): make FILE path-mode devId globally unique (#34362)
Co-authored-by: hekh <hekh@local>
Co-authored-by: Claude <noreply@anthropic.com>
2026-09-01 09:11:59 -07:00
Thomas Wang bb3e3cbceb [AMD] Fix v4 topk issue (#37439) 2026-09-01 08:37:30 -07:00
billishyahao 44a92e54b9 [AMD] fix aiter cannot get heuristic kernel regression (#37438) 2026-09-01 08:35:31 -07:00
DarkSharpnessandClaude Opus 5 cb6dd58fbe [Kernel] Replace dsv3_router_gemm with the unified tiny GEMM (#34693)
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
2026-09-01 23:00:21 +08:00
ee462b5899 [Kernel] Add tuned LFM2.5 Triton MoE configs on B300 (#37158)
Co-authored-by: Song Bian <biansonghz@gmail.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
2026-09-01 22:55:38 +08:00
Xiaoyu Zhang 5993f91f84 [Kernel] Register merged diffusion agent kernels with KDA backend (#37385) 2026-09-01 22:51:10 +08:00
DarkSharpnessandClaude Opus 5 b6c06e1efb [DSA] Drop the redundant 512 from the top-k transform entry-point names (#36831)
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
2026-09-01 22:37:03 +08:00
3ae54c6ca2 test(npu): add DSV4-Flash / GLM-5.2 / Kimi-K3 gpqa accuracy cases (#37431)
Co-authored-by: Sugar920 <Sugar920@users.noreply.github.com>
Co-authored-by: Claude <noreply@anthropic.com>
2026-09-01 22:00:04 +08:00
Estrella-xx 4c2c169e6b [NPU]Strip padding before FIA kernel for vision encoder padded sequences (#36329) 2026-09-01 19:28:19 +08:00
Eric.Chin.AMDandKingRei ed122ea984 [AMD] Enable topk v2 GLM ROCm (#36851)
Co-authored-by: KingRei <hiroki1139@gmail.com>
2026-09-01 03:48:50 -07:00
YC Yen-Ching Tseng b425897366 [AMD] Gate the aiter memory-reserve exemption behind an env var (#37242) 2026-09-01 03:46:15 -07:00
Jialin Ouyang a77283fb02 [Rust] Rename mem-cache to sglang-radix-tree (#37290) 2026-09-01 03:03:44 -07:00
chx96642264 c16a8fc899 [NPU] [bugfix] Fix NPU MLA HiCache backup accessing missing data_ptrs. (#36813) 2026-09-01 17:31:11 +08:00
eeecho b68702be99 [DSV4] hc-prenorm: fuse the combine step into a Triton kernel (#35118) 2026-09-01 02:04:05 -07:00